Casio CTK-750 manual CPU HD6433298A18P, Pin No Terminal In/Out Function

Page 8

Initial reset

When batteries are set or an AC adapter is connected, the reset IC provides a low pulse to the CPU. The CPU then initializes its internal circuit and clears data in the working strage RAM.

Power ON reset

When the power switch is pressed, the CPU receives a low pulse of POWER signal. The CPU first raises APO signal to +5V to generat DVDD voltage, then raises RESET signal to +5V. During this period the gate array, the DSP and the key touch LSI initializes their internal circuit.

CPU (HD6433298A18P)

The 16-bit CPU contains a 32k-bit ROM, a 1k-bit RAM, seven 8-bit I/O ports, an A/D convertor and serial interfaces. The CPU accesses to the working strage RAM, the DSP and the key touch LSI. The CPU also controls buttons, LEDs, bender input and MIDI input/output.

Pin No.

Terminal

In/Out

Function

 

 

 

 

1

P40

Out

KO signal data output

 

 

 

 

2

P41

Out

Clock for KO signal data

 

 

 

 

3

P42

Out

APO (Auto Power Off) signal output. ON: High, OFF: Low

 

 

 

 

4

P43

Out

Read enable signal output

 

 

 

 

5

P44

Out

Write enable signal output

 

 

 

 

6

P45

 

Not used.

 

 

 

 

7

P46

Out

10MHz clock output

 

 

 

 

8

P47

In

Wait signal input. Connected to +5V.

 

 

 

 

9

TXD

Out

MIDI signal output

 

 

 

 

10

RXD

In

MIDI signal input

 

 

 

 

11

P52

Out

Reset signal output

 

 

 

 

12

-RESET

In

Reset signal input

 

 

 

 

13

-NMI

In

Power ON signal input.

 

 

 

 

14

VCC

In

+5V source

 

 

 

 

15

-STBY

In

Standby signal input. Connected to +5V.

 

 

 

 

16

VSS

In

Ground (0V) source

 

 

 

 

17

XTAL

In

20MHz clock input

 

 

 

 

18

EXTAL

In

20MHz clock input

 

 

 

 

19, 20

MD1, MD0

In

Mode selection input. (Internal ROM mode --- MD1: Hight, MD0: Low)

 

 

 

 

21

AVSS

In

Ground (0V) source for internal DAC

 

 

 

 

22

AN0

In

Analog input. Connected to the bender volume.

 

 

 

 

23 ~ 29

P71 ~ P77

In

Button input signal input

 

 

 

 

30

AVCC

In

+5V source for internal DAC

 

 

 

 

31 ~ 38

P60 ~ P67

Out

LED segment signal output

 

 

 

 

39

VCC

In

+5V source

 

 

 

 

40 ~ 56

P27 ~ P10

Out

Address bus

 

 

 

 

48

VSS

In

Ground (0V) source

 

 

 

 

57 ~ 64

P30 ~ P37

Ijn/Out

Data bus

 

 

 

 

— 6 —

Image 8
Contents CTK-750 Contents Specifications GeneralReplacing the DSP HG51A115A01FD ElectricalBlock Diagram UPD6376CXCircuit Description Key MatrixReset Circuit Nomenclature of KeysButton Matrix MidiCPU HD6433298A18P Pin No Terminal In/Out FunctionGate Array UPD65005C-578 Digital Signal Processor HG51A115A01FD Block diagram of DSP and DAC circuit Key Touch LSI HG52E35P Filter Block Power Amplifier LA4620 Power Supply CircuitName Voltage For operation AvddWiring Diagram M5712-CN1MMajor Waveforms Page PCB View and Major Check Points Schematic Diagrams Console PCB M5712-CN1M Keyboard PCBs M615T-KY1M, KY2M Exploded View IC Lead Identification and Internal Diagram S8053ANOM5218APR PC900VBe C B Q2 2SD1762E,F Q4 2SB1274EB C E Parts List N N FOB Japan Code No Parts Name Specification Yen Unit Price Lower Case Screws MA0300941A