Allegro Multimedia A1321 manual Package UA, 3-Pin SIP

Page 11

A1321, A1322, and A1323

Ratiometric Linear Hall Effect Sensor for High-Temperature Operation

Package UA, 3-Pin SIP

4.09

 

 

45°

B

 

 

 

2.01

C

3X10°

3.02

1.44

C

 

 

C

 

 

 

0.79

1.02

 

 

MAX

 

 

14.99

0.41

1

2

3

 

 

 

 

0.43

1.27

A

1.52

45°

3.02

15.75

4.09

45°

2.01 C

2.16

MAX

1

2

3

 

 

 

0.43

1.27

B

1.44 C

C

0.79

0.41

A

1.52

45°

Package UA, Matrix Leadframe

All dimensions nominal, not for tooling use Dimensions in millimeters

Exact case and lead configuration at supplier discretion within limits shown

Package UA, Conventional Leadframe

AActive Area Depth, 0.50 mm

BGate and tie bar burr area (for conventional leadframe, gate burr only)

CHall element, not to scale

Copyright ©2004-2008, Allegro MicroSystems, Inc.

The products described herein are manufactured under one or more of the following U.S. patents: 5,045,920; 5,264,783; 5,442,283; 5,389,889; 5,581,179; 5,517,112; 5,619,137; 5,621,319; 5,650,719; 5,686,894; 5,694,038; 5,729,130; 5,917,320; and other patents pending.

Allegro MicroSystems, Inc. reserves the right to make, from time to time, such departures from the detail specifications as may be required to per- mit improvements in the performance, reliability, or manufacturability of its products. Before placing an order, the user is cautioned to verify that the information being relied upon is current.

Allegro’s products are not to be used in life support devices or systems, if a failure of an Allegro product can reasonably be expected to cause the failure of that life support device or system, or to affect the safety or effectiveness of that device or system.

The information included herein is believed to be accurate and reliable. However, Allegro MicroSystems, Inc. assumes no responsibility for its use; nor for any infringement of patents or other rights of third parties which may result from its use.

For the latest version of this document, visit our website:

www.allegromicro.com

Allegro MicroSystems, Inc.

11

115 Northeast Cutoff

Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com

Image 11
Contents A1321, A1322, and A1323 A1321, A1322, and A1323 Output Characteristics over VCC LH Package Characteristics Symbol Test Condition Min Typ3 Max Units4UA Package Linearity and Symmetry. The on-chip output stage Characteristic DefinitionsPieces, 3 fabrication lots Typical Characteristics575 Vcc = 5 525 Power Dissipation versus Ambient Temperature Characteristic Symbol Test Conditions Value UnitsPower Derating Pin-out Drawings Symbol Number Description Package LH Package UAPackage LH, 3-Pin SOT-23W Package UA, 3-Pin SIP