Allegro Multimedia A1321 manual Power Derating

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A1321, A1322, and A1323

Ratiometric Linear Hall Effect Sensor for High-Temperature Operation

Power Derating

The device must be operated below the maximum junction temperature of the device, TJ(max). Under certain combinations of peak conditions, reliable operation may require derating sup- plied power or improving the heat dissipation properties of the application. This section presents a procedure for correlating factors affecting operating TJ. (Thermal data is also available on the Allegro MicroSystems Web site.)

The Package Thermal Resistance, RθJA, is a figure of merit sum- marizing the ability of the application and the device to dissipate heat from the junction (die), through all paths to the ambient air. Its primary component is the Effective Thermal Conductivity, K, of the printed circuit board, including adjacent devices and traces. Radiation from the die through the device case, RθJC, is relatively small component of RθJA. Ambient air temperature, TA, and air motion are significant external factors, damped by overmolding.

The effect of varying power levels (Power Dissipation, PD), can be estimated. The following formulas represent the fundamental relationships used to estimate TJ, at PD.

PD = VIN × IIN

(1)

ΔT = PD × RθJA (2)

 

TJ = TA + ΔT

(3)

For example, given common conditions such as: TA= 25°C, VCC = 12 V, ICC = 4 mA, and RθJA = 140 °C/W, then:

PD = VCC × ICC = 12 V × 4 mA = 48 mW

ΔT = PD × RθJA = 48 mW × 140 °C/W = 7°C

TJ = TA + ΔT = 25°C + 7°C = 32°C

A worst-case estimate, PD(max), represents the maximum allow- able power level (VCC(max), ICC(max)), without exceeding TJ(max), at a selected RθJA and TA.

Example: Reliability for VCC at TA=150°C, package UA, using minimum-K PCB.

Observe the worst-case ratings for the device, specifically: RθJA=165°C/W, TJ(max) =165°C, VCC(max) = 5.5 V, and

ICC(max) = 8 mA.

Calculate the maximum allowable power level, PD(max). First, invert equation 3:

ΔTmax = TJ(max) – TA = 165°C–150°C = 15°C

This provides the allowable increase to TJ resulting from internal power dissipation. Then, invert equation 2:

PD(max) = ΔTmax ÷ RθJA = 15°C ÷ 165 °C/W = 91 mW

Finally, invert equation 1 with respect to voltage:

VCC(est) = PD(max) ÷ ICC(max) = 91 mW ÷ 8 mA = 11.4 V

The result indicates that, at TA, the application and device can dissipate adequate amounts of heat at voltages ≤VCC(est).

Compare VCC(est) to VCC(max). If VCC(est) ≤ VCC(max), then reli-

able operation between VCC(est) and VCC(max) requires enhanced RθJA. If VCC(est) ≥ VCC(max), then operation between VCC(est) and VCC(max) is reliable under these conditions.

Allegro MicroSystems, Inc.

9

115 Northeast Cutoff

Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com

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Contents A1321, A1322, and A1323 A1321, A1322, and A1323 Output Characteristics over VCC Characteristics Symbol Test Condition Min Typ3 Max Units4 UA PackageLH Package Linearity and Symmetry. The on-chip output stage Characteristic DefinitionsPieces, 3 fabrication lots Typical Characteristics575 Vcc = 5 525 Power Dissipation versus Ambient Temperature Characteristic Symbol Test Conditions Value UnitsPower Derating Symbol Number Description Package LH Package UA Package LH, 3-Pin SOT-23WPin-out Drawings Package UA, 3-Pin SIP