Texas Instruments DEM-DAI3793A manual Register Control with DSP Interface, Package Information

Page 99

www.ti.com

Package Information

A.2.1 Register Control with DSP Interface

Table A-2summarizes the recommended power-on sequence for the PCM3793A. The shaded cells within the table indicate specific register settings that must be configured for the device to properly operate with a DSP interface.

Table A-2. Recommended Power-On Sequence for PCM3793A

 

REGISTER

 

STEP

SETTINGS

NOTE

 

 

 

1

Turn on all power supplies.(1)

2

4027h

Headphone amplifier L-ch volume (–6dB)(2)

3

4127h

Headphone amplifier R-ch volume (–6dB)(2)

4

4227h

Speaker amplifier L-ch volume (–6dB)(2)

5

4327h

Speaker amplifier R-ch volume (–6dB)(2)

6

4427h

Digital attenuator L-ch (–24dB)(2)

7

8(3)

9

10(3)

11

12(5)

13(5)

14

15

16

17

18

19

20

21

22

23

24

4527h

Digital attenuator R-ch (–24dB)(2)

4620h

DAC audio interface format (left-justified)(4)

4BC0h

Headphone detection enable and inverting polarity. Short and thermal detection enable.

5102h

ADC audio interface format (left-justified)(4)

5A10h

VCOM ramp up/down time control. PG1, PG2 gain control (0dB)

49E0h

DAC (DAL, DAR) and analog bias power up

5601h

Zero-cross detection enable

4803h

Analog mixer (MXL, MXR) power up

5811h

Analog mixer input (SW2, SW5) select

49FCh

Headphone amplifier (HPL, HPR, HPC) power up

4C03h

Speaker amplifier shut down release

4A01h

VCOM power up

523Fh

Analog front end (ADL, ADR, D2S, MCB, PG1, 2, 5, 6) power up

5711h

Analog input (MUX3, MUX4) select. Analog input (MUX1, MUX2) select

4F0Ch

Analog input L-ch (PG3) volume (0dB)(2)

500Ch Analog input R-ch (PG4) volume (0dB)(2)

Any settings for other devices or wait time, 450ms(6) (7)

49FFh

Speaker amplifier (SPL, SPR) power up (5)

(1)VDD should be turn on prior to or simultaneously with the other power supplies. It is recommended to set register data with the system clock input after turning all power supplies on.

(2)Any level is acceptable for volume or attenuation. Level should be resumed by register data recorded when system power off.

(3)I2S: 4620h; Left-Justified: 4601h; Right-Justified: 4602h; DSP: 4603h.

(4)Audio interface format should be set to match the DSP or decoder being used.

(5)Between steps 12 and 13, add this value for slave configuration: 5400h. For master configuration, add: 5440h.

(6)The PCM3793A requires time for VCOM to reach the common level from GND level. The delay depends on the capacitor value for VCOM and the setting of register 125 PTM[1:0], RES[4:0]. The default setting is 450ms at VCOM = 4.7μs.

(7)The PCM3794A does not require this setting because it has no speaker output.

A.3 Package Information

Packaging information includes a thermal pad mechanical drawing and an example board layout. These examples are taken from the PCM3793A product data sheet (available for download at www.ti.com).

SBAU127 –July 2007

Reference .csv Files, Interfacing to DSPs, and Package Information

99

Image 99
Contents Users Guide Submit Documentation Feedback Contents 100 List of Figures Side List of Tables Submit Documentation Feedback Information About Cautions and Warnings About This Manual How to Use This ManualTrademarks Related Documentation From Texas InstrumentsAdditional Documentation If You Need Assistance FCC WarningPin Assignments and Terminal Functions DescriptionIntroduction-PCM3793A/94A Key FeaturesIntroduction-PCM3793A/94A PCM3793A/94A Terminal Functions Pin Assignments and Terminal FunctionsDEM-DAI3793A/3794A EVM Description DEM-DAI3793A/3794A EVM System DiagramSBAU127 -July Getting Started Unpacking the EVM Electrostatic Discharge WarningEVM Configuration Default ConfigurationDaughter Card #2 DEM-TRVC/LPC MotherboardSet-Up Guide Basic Operating Set-Up Software Control and OperationUser Interface Panel Module Function Controls Power On/Off SequenceHP COM/MONO HPC Power Up/DownPCM3793A/94A Resistor 1257dh RES40 Resistor Value Control Power Up/Down Time ms OptionsSetting Default Setting Record Ramp Up Wave Form with DefaultGain Control for ADC Input Options Digital Mute ATR OptionsDigital Out Mute Control Options Playback Function Menu Tab PlaybackSpeaker Gain Control Options Headphone Gain Control OptionsDigital Attenuation ATP Options Auto Level Control Record OptionsALC Automatic Level Control Tone Control Options Signal ProcessingSource Options Output OptionsClick Apply to Filter 1 or Apply to Filter 3D Effect Options15. Notch Filter Characteristic Model High-Pass Filter Options DAC Oversampling Control OptionsZero Cross Control Options De-Emphasis Filter Options18. Analog Path Function Menu Tab Analog PathMic Boost Options Analog Input OptionsD2S Select Options Analog Mixer OptionsAudio Interface Audio Interface Setting 1 OptionsAudio Interface Setting 2 Options PG5 Gain and PG6 Gain OptionsSpeaker Short Detection, L-Ch Speaker Short Detection, R-Ch HP Detection OptionsHP COM Short Detection Options HP Short Detection, L-Ch HP Detection, R-ChDigital Amplifier 4 LC89052T DIR Digital Audio I/F Receiver Control Window24. Register Setting History Window Register Setting History25. Opening and Modifying a .csv File Modifying a .csv FileRegister Direct Access Read functionWrite function Daughter Card #2 DIR LC89052T and DIT DIT4096 Switches and ConnectorsMotherboard Main Power Supply and RegulatorPower-Supply Terminals for PCM3793A Power-Supply Pins OverviewI/F Controller MSP430, TUSB3410 Audio I/OAnalog Input and Output-Daughter Card #1 Daughter Card #1 PCM3793AAnalog Output Configuration Daughter Card #1 Daughter Card #2 DIR LC89052T and DIT DIT4096 Analog Input and Output-Daughter Card #2Audio Clock and Input Data Control Format-Daughter Card #2 Evaluation and Measurements Slave Mode Configuration With SYS-2722 Slave Mode With Audio Precision SYS-2722 Default SettingJumper Configuration for Slave Mode Default Master Mode Configuration With SYS-2722 Master Mode with Audio Precision SYS-2722Jumper Configuration for Master Mode Combined Master and Slave Modes With PSIA-2722 Combined Master and Slave Mode Configuration with SYS-2722Jumper Configuration for Combined Master and Slave Modes Measurements for Dynamic CharacteristicsDigital-to-Analog D/A Performance D/A Line Output ParametersΩ Headphone Output Inserted in Headphone Jack J6 Stereo Speaker Output Parameters Speaker Output Power PerformanceAnalog-to-Digital A/D Performance A/D Line Input ParametersLC Low-Pass Filter Speaker Output Filter ConfigurationAmplitude Versus Frequency Performance 4.1 A/D SpectrumResult BPZ Zero Data Input Result -60dB Input 11. D/A Amplitude vs Frequency 4.2 D/A SpectrumPCM3793A/94A Connection Diagram for Practical Applications16. Recommended Ferrite Bead Filter for Speaker Output Filter Consideration for Speaker OutputSchematic, PCB Layout, and Bill of Materials PCM3793A DEM-PCM3793RHB-A Connector Daughter Card #1 SchematicsPCM3793A DEM-PCM3793RHB-A Daughter Card #1 PCM3793A DEM-PCM3793RHB-A Board Layout-Silkscreen Side Printed Circuit Board LayoutPCM3793A DEM-PCM3793RHB-A Board Layout-Component Side PCM3793A DEM-PCM3793RHB-A Board Layout-Inner Layer PCM3793A DEM-PCM3793RHB-A Board Layout-Inner Layer PCM3793A DEM-PCM3793RHB-A Board Layout-Solder Side Bill of Materials Component ListSubmit Documentation Feedback Appendix a Table A-1. .csv Files Reference .csv FilesFigure A-1. Line Output and Headphone Output Related Signal Flow DiagramsFigure A-2. Headphone Output with Sound Effect Figure A-3. Cap-Less Headphone Output Figure A-4. Headphone Output with Line Input AIN2L/AIN2R 0dB AIN3L MUX1 AIN2L AIN1L D2S AIN1R MUX2 AIN3R AIN2R Figure A-7. Stereo Speaker Output Figure A-8. Mono Speaker Output Figure A-9. Speaker Output with Line Input AIN2L/AIN2R Figure A-10. Speaker Output with Mono Mic Input AIN1L, +20dB +20dB Figure A-12. Line Input AIN2L/AIN2R to Headphone Output Figure A-13. Mono Line Input AIN2L to Headphone Output Figure A-14. Mono Mic Input AIN1L, +20dB to Headphone Output +20dB Figure A-16. Mono Mic Input AIN1L, +20dB to Speaker Output Figure A-17. Line Input AIN3L/AIN3R Figure A-18. Mic Input AIN1L/AIN1R, +20dB Figure A-19. Mic Input AIN1L/AIN1R, +20dB with ALC Figure A-20. Mono Mic Input AIN1L, +20dB Figure A-21. Mono Mic Input AIN1L, +20dB with ALC Figure A-22. Mono Diff Mic Input AIN1L/AIN1R, +20dB Figure A-23. Mono Diff Mic Input AIN1L/AIN1R, +20dB with ALC Interfacing to DSPs Figure A-24. Slave Mode OperationTable A-2. Recommended Power-On Sequence for PCM3793A Register Control with DSP InterfacePackage Information FCC Warning Evaluation BOARD/KIT Important NoticeImportant Notice

DEM-DAI3793A specifications

The Texas Instruments DEM-DAI3793A is a versatile digital-to-analog converter (DAC) evaluation module designed for assessing the performance and capabilities of TI's DACs in various applications. This module features the high-performance DAC3793, which is widely recognized for its precision and flexibility, making it an ideal choice for audio, industrial automation, and communication systems.

One of the standout features of the DEM-DAI3793A is its ability to support a 16-bit resolution. This high resolution enables the module to provide fine granularity in signal representation, ensuring that even the most subtle changes in the input signal are accurately reflected in the output. The DAC3793 also boasts a high sampling rate, which is crucial for applications that require rapid signal processing and real-time data conversion.

The module incorporates advanced technologies such as dynamic element matching and integrated circuitry to minimize distortion and noise. These technologies are crucial for achieving high-fidelity audio playback and improving overall system performance. Additionally, the DEM-DAI3793A is designed to minimize power consumption while maintaining exceptional performance levels, making it suitable for battery-operated devices and energy-conscious applications.

Another significant characteristic of the DEM-DAI3793A is its ease of integration with various development environments. The evaluation module supports both hardware and software interfacing, allowing engineers to quickly prototype and test their designs. It comes equipped with a USB interface for seamless connectivity with computers, along with supporting software tools that facilitate the configuration and testing of the DAC's functionalities.

The DEM-DAI3793A is also designed with a robust set of output options, including differential and single-ended outputs. This flexibility allows for compatibility with a wide range of amplification and filtering circuits. Furthermore, the evaluation module is equipped with convenient power supply options, enabling it to operate in various settings without the need for extensive modifications.

In conclusion, the Texas Instruments DEM-DAI3793A is an exceptional evaluation module that showcases the capabilities of the DAC3793. With its high resolution, advanced technologies, ease of integration, and flexible output options, it serves as an indispensable tool for engineers and developers working on high-performance audio and data processing applications.