Texas Instruments TA5704EVM manual ADC Interface, Board Power up General Guidelines

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2.5ADC Interface

In the absence of digital signal source ADC (PCM1808) may be used to convert an analog audio signal to digital signal and provide it to TAS5704. DIR9001 still provides clocks to ADC in this process. The frequency of the oscillator selected for DIR 9001determinse the sampling frequency in the absence of digital signal. If the OSC is 24MHz the sampling frequency will be set at 96kHz and if the OSC is selected to be 12MHz the sampling frequency will be defaulted to 48kHz when there is no signal on SPDIF input terminals. ADC is an additional feature to this board to provide flexibility in sourcing audio signal to TAS5704. Please review the datasheet of PCM1808 for detail description of the ADC on this EVM.

2.6Board Power up General Guidelines

After connecting the loud speakers (loads), power supply, and data line, power up the VIN power supply. Then power up the PVCC power supply. It is recommended to set the PVCC level to 10 volts and then ramp it up to 20 volts to verify the cable connection functionality. It is recommended to set the gain to –3dB at start by having both GAIN (GAIN0 and GAIN1) jumpers inserted. Note that the gain settings marked on the EVM are not correct. Please see Table 3 on the next page for the correct settings. Having jumpers FM0 and FM1 inserted and FM2 removed sets the data format for the device to I2S format. Make sure the SPDIF format jumpers, FMT0 and FMT1 are removed to set the receiver format to I2S. It is important to note that a device RESET (S2 on the top of the board labeled MASTER RESET) needs to be applied after each gain, format, or configuration change in order for the device to latch in the new settings. Finally, install jumpers CFG1 and CFG2 in the Config Control to select 2-CH-BTL-ADmode.

3 Jumpers and Control Utilities

3.1Clock Frequency Change Jumper

JP1: In the presence of a valid digital signal input, when SPDIF lock occurs, the user may use JP1 to change LR clock and BIT clock. When a shunt is inserted, the SCKO = 512Fs and when the shunt is removed the SCKO = 256Fs. Default is SCKO = 256Fs.

In the absence of a valid digital signal DIR9001 clock outputs switch to the frequency of crystal (Y1). If the crystal is chosen to be 24MHz the LR clock will be 96KHz and if the crystal is chosen to be 12MHz the LR clock will be 48kHz.

3.2SPDIF/PSIA Utilization Jumpers

The jumpers MCLK, LRCK, SCLK, SDATA allow the user to switch between the internal clock and data sources and external clock and data sources for instance PSIA (from AP instrument). The default configuration of these jumpers is SPDIF as it is marked on the EVM with a white arrow. PSIA outputs may be utilized using pins 2 and 3 of the jumpers. Keep in mind that pin 3 of each jumper is connected to GND. Thus, the user must pay attention to the polarity of the PSIA output cables at the time of insertion.

3.3Data Routing Jumpers

Jumpers SDIN1, SDIN2: These jumpers enable the user to assign a data source to TAS5704 SDIN1 and SDIN2 pins. See Table 2.

Table 2. TAS5704 SDINx Data Source

Jumper JP15:SDIN1	Jumper JP16:SDIN2	SDIN1 Source	SDIN2 Source
Position	Position
1-2	1-2	ADC	ADC
1-2	2-3	SPDIF/PSIA	SPDIF/PSIA
2-3	1-2	SPDIF/PSIA	ADC
2-3	2-3	SPDIF/PSIA	SPDIF/PSIA

SLOU224–April 2008	TA5704EVM 4-Channel Digital Audio Power Amplifier with Hardware Control	11
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