Texas Instruments TA5704EVM manual Spdif Receiver

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SPDIF RECEIVER

 

 

ENGINEERING EVALUATION ONLY

 

 

 

 

 

 

 

SPDIF

 

 

 

 

 

 

 

LOCK

 

U2

 

 

 

 

 

 

RCA INPUT

SPDIF FORMAT

 

 

 

 

 

 

DATA FORMAT

FMT1 FMT0

 

 

 

 

 

16Bit/MSB/RJ

L

L

 

 

 

 

 

24Bit/MSB/RJ

L

H

 

 

 

 

 

24Bit/MSB/LJ

H

L

 

 

 

 

OPTO INPUT

24Bit/MSB/I2S

H

H

 

 

 

 

 

 

 

 

 

 

 

 

SHUNTS IN = 0

 

JUMPER NOTES

 

 

SHUNTS OUT = 1

 

 

 

1-2: SPDIF CLOCKS/DATA

 

 

 

 

TO

 

 

 

2-3: CLOCKS/DATA = PSIA

 

DIR9001PW

 

 

 

(MCLK)

TAS5704

 

 

 

 

 

 

 

 

 

 

 

 

JP1 IN: SCKO = 512 Fs

 

 

 

 

(SDATA)

 

 

 

 

 

 

 

 

JP1 OUT: SCKO = 256 Fs (DEFAULT)

 

 

 

 

(SCLK)

 

 

 

 

 

 

 

 

 

 

 

 

(LRCLK)

 

SPDIF

 

 

 

 

 

 

 

INPUT

 

 

JUMPER NOTES

 

 

SELECT

 

 

 

TO

1-2: OPTO INPUT

 

 

1-2: SPDIF CLOCKS/DATA (DEFAULT)

ADC

2-3: COAX INPUT

 

 

2-3: CLOCKS/DATA = PSIA

 

 

OPTO

 

 

 

 

 

 

 

INPUT

 

 

 

 

 

 

 

COAX

 

 

 

 

 

 

 

INPUT

 

 

 

 

 

 

 

FROM MASTER RESET

 

 

 

 

 

 

 

DECOUPLING

DECOUPLING

 

 

 

 

 

 

 

 

 

CX PROJECT: TAS5704 EVALUTION MODULE

 

 

 

Design Team:

RYAN KEHR

 

 

 

 

 

Schematic Rev:

NC

Mod: NC

PCB Rev: NC Sheet

1 of 6

 

 

 

Save Date: JULY 10, 2007

Print Date Tue Jul 10, 2007

 

TIFilename: TAS5704EVM.SCH

 

Drawn By: LDN

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Contents Users Guide Submit Documentation Feedback Contents List of Figures Read This First Additional Documentation Users Guide TAS5704EVM Features Channel SE + 1-Channel BTL ConfigurationBasic Tools for Initial Board Power up PSU InterfaceDigital Audio Interface Spdif J1/OPTO PSC ConnectorRecommended Power Supplies Board Power up General Guidelines ADC InterfaceClock Frequency Change Jumper SPDIF/PSIA Utilization JumpersData Format Jumpers Config JumpersGain Jumpers Switches TAS5704 Output ConfigurationTAS5704EVM Board Layout, Top Composite View Top Layer CompositeTAS5704EVM Board Layout, Top Layer View Top LayerTAS5704EVM Board Layout, Bottom Layer View Bottom LayerBill of Materials Bill of Materials for TAS5704EVMFerrites and Inductors Schematic NON-INSULATED Wire Ground LoopsSpdif Receiver Analog to Digital Converter TAS5704 I/O Power Supplies Revision Changes Texas Instruments Disclaimer Evaluation BOARD/KIT Important Notice FCC WarningImportant Notice