SRS Labs SR530, Lock-In Amplifier manual Appendix C Introduction to the Gpib, Bus Description

Page 49

Appendix C: Introduction to the GPIB

The IEEE-488 Standard specifies the voltage levels, handshake requirements, timing, hardware details, pinout and connector dimensions for a 16 line, bit parallel bus. Many instruments may be connected in series to communicate over the same cable. Because the bits are passed in parallel, the GPIB is faster than the RS232.

The controller (generally your computer) coordinates data transfer on the bus by designating all participating instruments (including itself) as either a talker or a listener. Listeners can receive data placed on the bus by the Talker. Devices can have the capacity to operate in either mode. The address of each device is set by switches in the device and must be between 0 and 30.

Bus Description

Byte Transfer Control Group. This consists of 3 negative logic lines that implement the GPIB handshaking. The NRFD (Not Ready For Data) line is held low by any designated listener who is not ready to accept data. When every listener is ready, the line goes high and the talker may release data to the bus. After data is on the bus, the talker pulls the DAV (Data Valid) line down. At this point, each listener retrieves the data. Before and during the retrieval of the data, the listener holds the NDAC (No Data Accepted) line down. When every listener has received the data, the NDAC line goes high, allowing the talker to release the DAV line high. Finally, the listener pulls down the NDAC line until another transfer is initiated.

Data Bus: There are eight data lines which use negative logic and pass the bits of each byte in parallel.

General Interface Lines: These five lines operate independently of the handshake lines and use negative logic.

1)The EOI (End or Identify) line is used by the talker to designate the end of message.

2)The SRQ (Service Request) line is used by any device to ask for service. The controller can serial poll each device (each device returns an 8 bit status byte) to determine who needs attention. It can also do a parallel poll using the EOI and ATN lines where each device is assigned a single data line.

3)The ATN (Attention) line makes both talkers and listeners accept information and passes control of the DAV line to the controller. This line is used by the controller to identify talkers and listeners through their addresses.

4)The REN (Remote Enable) line changes the status of an instrument from local to remote.

5)The IFC (Interface Clear) line clears the bus of all data and activity.

Though GPIB is a very powerful interface, strict protocol must be observed for it to operate successfully.

45

Page 48 Page 50
Image 49
Page 48 Page 50
Contents Model SR530 Page Table of Contents Appendix C Gpib NON-OPERATING OperatingPage SR530 Specification Summary Gpib DemodulatorFront Panel Summary Enbw Abridged Command List Status Byte Definition Configuration SwitchesSignal Filters Signal InputsSR510 Guide to Operation Front Panel SensitivityStatus Dynamic ReserveDisplay Select Channel 1 DisplayOutput Channel OutputRel Channel Offset ChannelRcosø Output Expand ChannelChannel 2 Display Auto Phase Reference Input Rsinø OutputTrigger Level Phase Controls Reference ModeReference Display Time ConstantDefaults PowerLocal and Remote SR530 Guide to Operation Rear Panel Page SR530 Guide to Programming Command SyntaxCommunicating with the SR530 Front Panel Status LEDsTry-Out with an Ascii Terminal RS232 Echo and No Echo OperationLOW Norm High SR530 Command ListN1,n2,n3,n4 Page Status Byte ErrorsBit Trouble-Shooting Interface Problems ResetCommon Hardware Problems include Common Software Problems includeSR530 with the Gpib Interface SR530 with the RS232 InterfaceGpib with RS232 Echo Mode Serial Polls and Service RequestsSR530 with Both Interfaces Measurement Example Lock-in TechniqueShielding and Ground Loops Understanding the SpecificationsPage Page SR530 Block Diagram Phase Sensitive Detectors Signal ChannelReference Channel DC Amplifiers and System GainCircuit Description Demodulator and Low Pass Amplifier Reference OscillatorExpand Analog Output and ControlFront Panel Microprocessor ControlRS232 Interface Power SuppliesGpib Interface Amplifier and Filter Adjustments Multiplier AdjustmentsCalibration and Repair Replacing the Front-End Transistors Notch FiltersNon-Essential Noise Sources Appendix a Noise Sources and CuresPage Page Appendix B Introduction to the RS232 Case 1 The Simplest ConfigurationBaud Rate Case 2 RS232 with Control LinesParity Stop BitsVoltage Levels Final TipBus Description Appendix C Introduction to the GpibProgram Example IBM PC, Basic, via RS232 Appendix D Program ExamplesProgram Example IBM PC, Microsoft Fortran v3.3, via RS232 Page #include stdio.h Program Example IBM PC, Microsoft C v3.0, via RS232Page Program Example 4 IBM PC,Microsoft Basic, via Gpib ′INCREMENT X6 Output by 2.5 MV Program Example HP85 via Gpib Documentation PC1 Oscillator Board Parts ListSW1 DpdtBR1 Main Board Parts ListBR2 BT1SR530 Component Parts List SR530 Component Parts List PIN D 22U MINGpib Shielded CX1FU1 CY1MPSA18 SR530 Component Parts List SR530 Component Parts List SR530 Component Parts List SR530 Component Parts List SR530 Component Parts List 4PDT SPSTX8SR513 Assy SR530 Component Parts List Static RAM, I.C Z80A-CPUTranscover TIE AnchorMica #4 FlatFront Panel Board Parts List RED LD2 LD1LD3 Quad Board Parts List SR530 Component Parts List PC1 SR530 Component Parts List Miscellaneous Parts List SR530 Component Parts List

SR530, Lock-In Amplifier specifications

The SRS Labs Lock-In Amplifier, model SR530, is a powerful tool designed for high-precision measurements in the realm of scientific research and industrial applications. This state-of-the-art instrument excels in extracting small signals from noisy environments, making it an invaluable asset for experiments in fields such as physics, engineering, and materials science.

One of the main features of the SR530 is its ability to perform synchronous detection, which is key to improving signal-to-noise ratios. By utilizing a reference signal, the device correlates the incoming signal with the reference to effectively filter out noise, allowing for the accurate measurement of weak signals that might otherwise be obscured. This process of phase-sensitive detection is fundamental to the operation of the Lock-In Amplifier.

The SR530 offers a wide frequency range, covering from 0.1 Hz to 100 kHz. This broad frequency response allows it to handle a diverse array of signals, making it suitable for various applications including optical detection, capacitance measurements, and in many cases, voltammetry. The device is also equipped with multiple inputs and outputs, facilitating the integration with other laboratory equipment and enabling complex experimental setups.

Precision is further enhanced with its adjustable time constant, which allows users to optimize the response time based on experimental needs. The user can choose time constants from 10 microseconds to 10 seconds, accommodating fast dynamic measurements as well as those requiring stability over longer durations.

Another remarkable characteristic of the SR530 is its digital processing capabilities. The device features a highly accurate digital voltage measurement system, minimizing drift and ensuring long-term stability. Additionally, the use of microprocessors enhances data handling and allows for features such as programmable settings, facilitating automated measurements.

Moreover, the SR530 includes a range of output options, including analog outputs, which can be used for direct signal processing, as well as digital interfaces for integration with computers. This ensures that users can not only capture high-fidelity data but also analyze and display it efficiently.

In conclusion, the SRS Labs SR530 Lock-In Amplifier stands out due to its sophisticated technology, versatile features, and robust performance. Its precision, flexibility, and ease of use make it an ideal choice for researchers and engineers looking to unlock the potential of weak signal measurement in complex environments.
Top Page Image Contents