Xilinx Frequency Generator manual Final Output Waveforms, Phase Accumulator

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Final Output Waveforms

These waveforms were obtained from stake pin ‘J4-IO12’ and reflect the final output of the frequency generator. Once again the digital storage oscilloscope was set to infinite persistence in order capture any fluctuations over time and therefore observe the ‘envelope’ of operation.

In these cases the frequency shown on the LCD display directly corresponds to the frequency provided at the output. However it is useful to understand what the phase accumulator is generating to appreciate if the second DCM in ‘frequency aligned mode’ is helping.

For this 12.5MHz waveform N=08000000 hex and D=02 hex. So in fact the phase accumulator is synthesizing 6.25MHz. This is again a perfect division of the 200MHz clock and means that the synthesized waveform is always formed of 32 clock periods with 16 Low and 16 High. There is therefore no obvious cycle jitter introduced and therefore it is not surprising that the final output (6.25MHz × 16 / 2(2+1) = 12.5MHz) is also nice and clean.

You may have to look closely to notice that this second plot really is 12.4125MHz. It is immediately clear that there is no obvious cycle to cycle jitter present. To confirm that this isn’t just a coincidence, we must again consider what the phase accumulator is doing at the same time.

With 12.4125MHz set, N=0FE353F7 hex and D=03 hex. So in fact the phase accumulator is actually synthesizing 12.4125MHz as well. More significantly, it means that the phase accumulator is generating exactly the same waveform as we observed previously on page 9 in which there was 5ns of cycle to cycle jitter present (see right).

Phase Accumulator

The final output (12.1425MHz × 16 / 2(3+1) = 12.1245MHz) shows that the frequency aligned mode of the DCM is tracking the average frequency of the input waveform and totally ignoring the phase of the input waveform resulting in a very low cycle to cycle jitter. In fact the DCM is only using the frequency information from the input waveform and the output cycle jitter is totally independent of the input cycle jitter.

Hint – When using a DCM in frequency aligned mode, you must accept that it does NOT maintain phase lock as it does in all other ‘normal’ modes. More significantly the output frequency is the average of the input frequency which means there will often be a slight difference as it tracks the input.

Frequency Generator for the Spartan-3E Starter Kit 11

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Contents Frequency Generator Limitations Design Overview Double click on ‘installfrequencygenerator.bat’Operating Instructions Edit cursor position modeEdit digit value mode Fpga Editor view PicoBlaze Design SizeMAP report Design Files ×16 Direct Digital Synthesis DDS Circuit DiagramOn the LCD PicoBlaze Circuit DiagramPhase Accumulator Waveforms 12.5MHz Harmonic Fundamental 12.4125MHz Fundamental Phase Accumulator SpectrumFinal Output Waveforms Phase Accumulator12.5MHz Fundamental 12.4125MHz Fundamental ±1.3MHz Final Output SpectrumSetting DCM Frequency Aligned Mode Exercises, Experiments and Suggestions

Frequency Generator specifications

The Xilinx Frequency Generator is a versatile and robust solution designed for a variety of applications requiring precise frequency generation and control. This device capitalizes on Xilinx's proven technology in programmable logic, enabling engineers to implement custom frequency generation schemes tailored to specific application needs.

One of the main features of the Xilinx Frequency Generator is its flexible frequency range. It supports a wide spectrum of frequencies, making it suitable for applications in telecommunications, aerospace, automotive, and industrial automation. The ability to generate frequencies from kilohertz to gigahertz opens up possibilities for diverse scenarios, such as clock generation, signal synthesis, and modulation tasks.

Another significant characteristic of this frequency generator is its programmability. Leveraging Xilinx's FPGA architecture, users can easily configure and program the frequency generator to meet changing requirements. This programmability allows for rapid prototyping and design iterations, enabling engineers to achieve optimal configurations with minimal downtime.

The device also employs advanced phase-locked loop (PLL) technology, ensuring excellent stability and low phase noise. PLLs enable the generation of output frequencies that are phase-coherent with an input signal, which is critical for applications requiring precise synchronization. This feature is especially beneficial in communication systems, where accurate timing and frequency stability are essential.

Furthermore, the Xilinx Frequency Generator supports multiple output formats, including sinusoidal, square, and triangle waves. This versatility in signal output enhances its usability across different applications, allowing for easy integration into existing systems.

Another innovative aspect of this frequency generator is its integration with Xilinx's software tools, such as Vivado and ISE. These tools facilitate the design, simulation, and implementation of frequency generation strategies, enhancing productivity and ensuring robustness in design processes.

In addition, the frequency generator's power efficiency is noteworthy. By employing cutting-edge low-power design techniques, it reduces energy consumption without compromising performance, making it an ideal choice for battery-powered or energy-sensitive applications.

All in all, the Xilinx Frequency Generator exemplifies cutting-edge technology in frequency generation, offering flexible configuration, excellent stability, and user-friendly integration, making it a compelling choice for engineers across various industries seeking a reliable frequency generation solution.
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