Xilinx Frequency Generator manual PicoBlaze Design Size, MAP report, Fpga Editor view

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PicoBlaze Design Size

The images and statistics on this page show that the design occupies just 172 slices, 1 BRAM and 2 DCMs. This is only 3.7% of the slices available in an XC3S500E device. More significantly, this slice count can be reduced to less than 32 when implementing a fixed frequency version.

MAP report

 

 

 

 

Number of occupied Slices:

172

out of

4,656

3%

Number of Block RAMs:

1

out of

20

5%

DCMs:

2

out of

4

50%

Total equivalent gate count for design: 91,537

PicoBlaze makes extensive use of the distributed memory features of the Spartan-3E device leading to very high design efficiency. If this design was replicated to fill the XC3S500E device, it would represent the equivalent of over 1.5 million gates. Not bad for a device even marketing claims to be 500 thousand gates ￿

FPGA Editor view

Floorplanner view

 

XC3S500E

 

Frequency Generator for the Spartan-3E Starter Kit 5

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Contents
Frequency Generator Limitations Design Overview Double click on ‘installfrequencygenerator.bat’Operating Instructions Edit cursor position modeEdit digit value mode Fpga Editor view PicoBlaze Design SizeMAP report Design Files ×16 Direct Digital Synthesis DDS Circuit DiagramOn the LCD PicoBlaze Circuit DiagramPhase Accumulator Waveforms 12.5MHz Harmonic Fundamental 12.4125MHz Fundamental Phase Accumulator SpectrumFinal Output Waveforms Phase Accumulator12.5MHz Fundamental 12.4125MHz Fundamental ±1.3MHz Final Output SpectrumSetting DCM Frequency Aligned Mode Exercises, Experiments and Suggestions