Pin No. | Pin Name | I/O | Description | |
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39 | RVSS | - | Right channel ground. (Must be connected to 0V.) | |
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40 | RCHO | O | Right channel output. | |
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41 | RVDD | - | Right channe power supply. | |
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42 | MUTER/CONT8 | O | Right channel mute output./ General purpose input/ output. | |
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43 | XVDD | - | Crystal oscillator power supply. | |
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44 | XOUT | O | Connections for a 16.9344 MHz crystal oscillator element. | |
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45 | XIN | I | ||
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46 | XVSS | - | Crystal oscillator ground. (Must be connected to 0V.) | |
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47 | SBSY | O | Subcode clock synchronization signal output. | |
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48 | EFLG | O | C1, C2, sigle an double error correction monitor. | |
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49 | PW | O | Subcode P, Q, R, S, T, U and W output. | |
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50 | SFSY | O | Subcode frame synchronization signal output. This signal falls when the subcode are | |
in standby stase. | ||||
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51 | SBCK | I | Subcode readout clock input. This is a Schmitt input. | |
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52 | FSX | O | Output pin for the 7.35 kHZ synchronization signal divided from the crystal oscillator. | |
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53 | WRQ | O | Subcode Q output standby output. | |
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54 | RWC | I | Read/write control input. This is a Schmitt input. | |
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55 | SQOUT | O | Subcode Q output. | |
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56 | COIN | I | Command input pin from control microprocessor. | |
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57 | CQCK | I | Input for both the command input acquisition clock and the SQOUT pin subcode | |
readout clock input pin. This is Schmitt input. | ||||
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58 | RES | I | Reset input. This pin must be set low briefly after power is first applied. | |
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59 | TST11 | O | Test output. Leave open. (Normally output a low level.) | |
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60 | 16M | O | 16.9344 MHz output. | |
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61 | 4.2M | O | 4.2336 MHz output. | |
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62 | TEST5 | I | Test input. A | |
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63 | CS | I | Chip seledt input. A | |
(Must be connected to 0V if not controlled.) | ||||
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64 | TEST1 | I | Test input. No | |
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