3 Chapter

Tweakers’ Paradise

The subitems in this menu allow you to set the CPU ratio and features.

BCLK Tuning

VCCIN Shadow Voltage [Auto]

Pseudo Voltage for VCCIN. Configuration options: [Auto] [0.800] – [2.440V]

Termination Anti-Aliasing [Auto]

Termination Anti-Aliasing can be enabled to smooth out the change of the PLL Termination Voltage, which may sometimes help to yield a better O.C. result. Configuration options: [Auto] [Disabled] [Enabled]

Initial PLL Termination Voltage [Auto]

Initial Voltage at which CPU BCLKs are terminated. Maintaining a level close to CPU Input Voltage will help BCLK Overclock.

Configuration options: [Auto] [0.0000] - [3.0000]

PLL Termination Reset Voltage [Auto]

PLL Termination Reset Voltage. Configuration options: [Auto] [0.0000] - [3.0000]

Eventual PLL Termination Voltage [Auto]

Eventual PLL Termination Voltage. Configuration options: ������[Auto] [0��������.0000] �- ��������[3.0000]

PCH ICC Voltage [Auto]

Power Supply for the Integrated Clock Controller. Lower may be better. Configuration options: [Auto] [0.6000] -[2.2000]

ICC Ringback Canceller [Auto]

ICC Ringback Canceller can be used to control the noise level at the Integrated Clock Controller.

[Enable] to allow better High DMI Frequency O.C. [Disable] to allow better Low DMI Frequency O.C.

Clock Crossing VBoot [Auto]

The instantaneous voltage value when the rising edge of BCLK DN is equal to the falling edge of the BCLK DP. Configuration options: [Auto] [0.1000] - [1.9000]

Clock Crossing Reset Voltage [Auto]

The instantaneous voltage value when the rising edge of BCLK DN is equal to the falling edge of the BCLK DP. Configuration options: [Auto] [0.1000] - [1.9000]

Clock Crossing Voltage [Auto]

The instantaneous voltage value when the rising edge of BCLK DN is equal to the falling edge of the BCLK DP. Configuration options: [Auto] [0.1000] - [1.9000]

BCLK Amplitude [Auto]

Allows you to adjust the magnitude of the BCLK.

Configuration options: [Auto] [+�5] - [-5]

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Chapter 3: BIOS setup