CyberResearch CPBH 3.20 Watchdog Timer

CyberResearch® CPU Cards CPBH Series

3.20 Watchdog Timer

Once the Enable cycle is active, a Refresh cycle is requested before the time-out period. This restarts counting of the WDT period. When the time counting goes over the period preset of WDT, it will assume that the program operation is abnormal. A System Reset signal will re-start when such error happens.

The following sample programs show how to Enable, Disable and Refresh the Watchdog Timer:

;----------------------------------------------------------------------------------

;Enter the WDT function mode, interruptible double-write ;----------------------------------------------------------------------------------

MOV	DX, 2EH
MOV	AL, 87H
OUT	DX, AL
OUT	DX, AL
MOV	DX, 2EH
MOV	AL, 07H
OUT	DX, AL
MOV	DX, 2FH
MOV	AL, 08H
OUT	DX, AL
MOV	DX, 2EH
MOV	AL, F5H
OUT	DX, AL	; select CRF0
MOV	DX, 2FH
MOV	AL, 80H
OUT	DX, AL
MOV	DX, 2EH
MOV	AL, F7H
OUT	DX, AL
MOV	DX, 2FH
MOV	AL, 00H
OUT	DX, AL
MOV	DX, 2EH
MOV	AL, F6H
OUT	DX, AL
MOV	DX, 2FH
MOV	AL, 00H	; * 00H=Disabled
OUT	DX, AL
;---------------------------------------------------------------------------------
; Exit extended function mode
;------------- -------------------------------------------------------------------
MOV	DX, 2EH
MOV	AL, AAH
OUT	DX, AL

*User can also use AL, 00H’s defined time for reset purposes, e.g.00H for Disable, 01H = 1sec, 02H = 2sec…..FFH = 255sec.

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