CY62158E MoBL→
Maximum Ratings
Exceeding the maximum ratings may impair the useful life of the device. These user guidelines are not tested.
Storage Temperature | |
Ambient Temperature with |
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Power Applied |
Supply Voltage to Ground Potential
DC Voltage Applied to Outputs |
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in | + 0.5V | |
| CC(max) |
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DC Input Voltage [3, 4] |
| + 0.5V | ||
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| CC(max) |
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Output Current into Outputs (LOW) |
| 20 mA | ||
Static Discharge Voltage |
| >2001V | ||
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Latch up Current |
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| >200 mA | |
Operating Range |
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Device | Range | Ambient |
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Temperature |
| VCC | ||
CY62158ELL | Industrial | 4.5V – 5.5V | ||
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Electrical Characteristics
Over the Operating Range
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Parameter | Description |
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| Test Conditions | Min | Typ [2] | Max | Unit | |||
VOH | Output HIGH Voltage |
| IOH = |
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| 2.4 |
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| V | ||
VOL | Output LOW Voltage |
| IOL = 2.1 mA |
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| 0.4 | V | ||
VIH | Input HIGH Voltage | VCC = 4.5V to 5.5V |
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| 2.2 |
| VCC + 0.5V | V | |||
VIIL | Input LOW Voltage | VCC = 4.5V to 5.5V |
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| 0.8 | V | ||||
IIX | Input Leakage Current | GND < VI < VCC |
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| +1 | μA | ||||
IOZ | Output Leakage Current | GND < VO < VCC, Output Disabled |
| +1 | μA | |||||||
ICC | VCC Operating Supply |
| f = fMAX = 1/tRC |
| VCC | = VCCmax |
| 18 | 25 | mA | ||
| Current |
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| IOUT | = 0 mA |
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| f = 1 MHz |
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| 1.8 | 3 | mA | |||||
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| CMOS levels |
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ISB1 | Automatic CE Power down |
| CE | 1 > VCC− 0.2V, CE2 | < | 0.2V |
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| 2 | 8 | μA | |
| Current — CMOS Inputs |
| VIN > VCC – 0.2V, VIN < 0.2V) |
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| f = fMAX | (Address and Data Only), |
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| f = 0 (OE, and WE), VCC = VCCmax |
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ISB2 [6] | Automatic CE |
| CE | 1 > VCC – 0.2V or CE2 < 0.2V, |
| 2 | 8 | μA | ||||
| Current — CMOS Inputs |
| VIN > VCC – 0.2V or VIN < 0.2V, |
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| f = 0, VCC = VCCmax |
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Capacitance
Tested initially and after any design or process changes that may affect these parameters.
Parameter | Description | Test Conditions | Max | Unit |
CIN | Input Capacitance | TA = 25°C, f = 1 MHz, | 10 | pF |
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| VCC = VCC(typ) |
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COUT | Output Capacitance | 10 | pF |
Thermal Resistance
Tested initially and after any design or process changes that may affect these parameters.
Parameter | Description | Test Conditions | TSOP II | Unit |
ΘJA | Thermal Resistance | Still Air, soldered on a 3 × 4.5 inch, | 75.13 | °C/W |
| (Junction to Ambient) |
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ΘJC | Thermal Resistance |
| 8.95 | °C/W |
| (Junction to Case) |
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Notes
3.VIL(min) =
4.VIH(max) = VCC + 0.75V for pulse durations less than 20 ns.
5.Full Device AC operation assumes a 100 μs ramp time from 0 to VCC (min) and 200 μs wait time after VCC stabilization.
6.Only chip enables (CE1 and CE2), must be tied to CMOS levels to meet the ISB2 / ICCDR spec. Other inputs can be left floating.
Document #: | Page 3 of 10 |
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