E N
(III) Pin assignment:
1
5
6 
10
11 
15
(1)
1 | 8 |
9 | 15 |
| (2) |
(1) The
Pin No. | Assignment |
|
| Pin No. | Assignment |
1 | Red video input |
| 9 | No pin | |
2 | Green video input |
| 10 | Logic ground | |
3 | Blue video input |
| 11 | Identification output | |
4 | Identification output |
|
|
| - connected to pin 10 |
| - Connected to pin 10 |
| 12 | Serial data line (SDA) | |
5 | Ground |
| 13 | H. Sync / H+V | |
|
|
|
|
| |
6 | Red video ground |
|
| 14 | V. Sync (VCLK for DDC) |
7 | Green video ground |
| 15 | Data clock line (SCL) | |
|
|
|
|
|
|
8 | Blue video ground |
|
|
|
|
|
|
|
|
|
|
❊Because of a policy of continuous product improvement, the above specifications are subject to change without notice.
12
