BIOS
EP-3VCA2
Page 4-9
DRAM Page-Mode: The item will active or inactive chipset page registers.
Enabled: Page-Mode Enabled.
Disabled: No page registers update and non Page-Mode operation.
Memory Hole : You can reserve this memory area for the use of ISA adaptor
ROMs. The default is Disabled.
Enabled: This field enables the main memory (15~16MB) to remap to ISA BUS.
Disabled:Normal Setting.
Note: If this feature is enabled you will not be able to cache this memory segment.
System BIOS Cacheable: This allows you to copy your BIOS code from slow
ROM to fast RAM. The default is Disabled.
Enabled: The option will improve system performance. However, if any program
writes to this memory area, a system error may result.
Disabled: System BIOS non-cacheable.
Video BIOS Cacheable: This option copies the video ROM BIOS to fast RAM
(C0000h to C7FFFh). The default is Disabled.
Enabled: Enables the Video BIOS Cacheable to speed up the VGA Performance.
Disabled: Will not use the Video BIOS Cacheable function.
Video RAM Cacheable: This option allows the CPU to cache read/writes of the
video RAM. The default is Disabled.
Enabled: This option allows for faster video access.
Disabled: Reduced video performance.
AGP Aperture Size: The amount of system memory that the AGP card is
allowed to share. The default is 64.
4: 4MB of systems memory accessable by the AGP card.
8: 8MB of systems memory accessable by the AGP card.
16: 16MB of systems memory accessable by the AGP card.
32: 32MB of systems memory accessable by the AGP card.
64: 64MB of systems memory accessable by the AGP card.
128: 128MB of systems memory accessable by the AGP card.
256: 256MB of systems memory accessable by the AGP card.