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•DRAM Speed Selection: This value must correspond to the speed of the DRAM installed in your system. DO NOT change the default setting of this field, as determined by the system board manufacturer for the installed DRAM. This value is access speed, so a lower value means a faster system. The default value is 60ns.
60ns: (Faster) Burst Wait State, for 60~70ns Fast Page Mode/EDO DRAM.
70ns: (Slower) Burst Wait State, for 70ns Fast Page Mode/EDO DRAM.
•DRAM RAS# Precharge Time: The precharge time is the number of cycles. It takes for the RAS to accumulate its charge before DRAM refresh. If insufficient time is allowed, refresh may be complete and the DRAM may fail to retain data. The default value is 3.
3: Time equals 3 host clocks.
4: Time equals 4 host clocks.
•MA Additional Wait State: This allows the option to insert an additional wait state before the beginning of a memory read. The default value is Disabled.
Enabled: One additional wait state is inserted before the assertion of the first MAxx and CASx#/RASx# assertion during DRAM read or write lead off cycles.
Disabled: No extra wait state for MAxx and CASx#/RASx#.
•RAS# to CAS# Delay: Allows you to insert a timing delay between the CAS and RAS strobe signals, used when DRAM is written to , read from, or refreshed. The default value is Enabled.
Enabled: Adds one clock between the assertion of RAS# and CAS#. (Better stability of the system)
Disabled: No delay between the assertion of RAS# and CAS#. (Faster Performance)
•DRAM Read/Write Burst (B/E/F): The default value is x2/2/3.
This field indicates the EDO/FPM(B/E/F) DRAM system Read/ Write burst mode. The value x2/2/3 stands for EDO(x222) or FPM(x333) respectively.
•ISA Bus Clock: Set the speed of the ISA bus here. The default value is PCICLK/4.
PCICLK/4: If the system is operating at 60/66MHz, then the PCICLK is 30/33MHz.
PCICLK/3: The system is operating at 50MHz, than PCICLK is 25MHz.
