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Epson RTC-72421 A, RTC-72421 B, RTC-72423, RTC-72423 A (A)Starting the count, (B)Checking the status of the BUSY bit, (C)Stopping and resetting the counter

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RTC - 72421 / 72423

(A)Starting the count

START

Set the CF register

Reg.F	←	0*00B
TEST	←	0
	←
24/12		0 or 1
	←
STOP		0
RESET ←		0

Set the CE register

This setting is not necessary when the STD.P pin is not used

Set the CD register

Reg.D	←	0*00B
30 s ADJ	←	0
30 s ADJ	←	0
IRQ FLAG	←	0 or 1
HOLD	←	0
HOLD		0

To next process

Set the IRQ FLAG bit to 0 when fixed-period interrupt mode is used, or to 1when it is not used.

(B)Checking the status of the BUSY bit

START

HOLD bit ← 1

Read the BUSY bit

BUSY bit=0?		NO
BUSY bit=0?
	YES
	YES		HOLD bit ← 0
			HOLD bit ← 0

To next process

(C)Stopping and resetting the counter

START

Set the CF register

Reg.F	←	0*11B

TEST	←	0
24/12	←	0 or 1
24/12	←	0 or 1
STOP	←	1
RESET ←		1

To next process

Page - 15

MQ - 162 - 03

Contents

Page In pursuit of "Saving" Technology ,Epson electronic device "Saving Epson IS energy savings •The material is subject to change without notice (AC characteristics) When ALE is used When ALE is fixed at VDD Notes Timing registers Built-in •Microprocessor bus compatible ( tWW, tRD = 120 ns ) •Use of C-MOSIC enables low current consumption ( 5 ∝ A Max., at VDD = 2.0 V ) •Compatibility with Intel CPU bus •Address latch enable (ALE) pin compatible with multiplex bus CPUs RTC-72421 RTC-72423 Signal Pin No Input/ou tput D0-D3 1. Absolute maximum ratings Specification 2. Recommended operating conditions 3. Frequency characteristics and current consumption characteristics 4. Electrical characteristics ( DC characteristics ) 1. When ALE is used 2. When ALE is fixed at VDD 1. Register table 2. Notes 3. Functions of register bits (overview) 4. Setting the fixed-periodpulse output mode and fixed-periodinterrupt mode 5. Resetting the fixed-periodpulse output mode and fixed-periodinterrupt mode 1. Timing registers (1) S1 to Y10 registers (2) W register Count Day 2. CD register (control register D) (1) HOLD bit (D0) (2) BUSY bit (D1) (3) IRQ FLAG bit (D2) i. Interrupt processing (interrupt status monitor function) *STD.P pin output IRQ FLAG bit iii. Initial setting of IRQ FLAG bit (4) 30-secondADJ bit (D3) i. Operation of 30-secondsADJ bit i. Setting t0 and t1 ii. STD.P pin output control (ITRPT/STND=0) (ITRPT/STND=1) iii. Frequency of STD.P pin output in fixed-periodpulse output mode 4. CF register (control register F) i. Switching between 12-hourclock and 24-hourclock ii.Overwriting the 24/12 bit Power On To next process (A)Starting the count (B)Checking the status of the BUSY bit (C)Stopping and resetting the counter 2. Read/write of S1 to W registers 3. Write to 30-secondADJ bit 4. Using the CS1 pin (1) Functions •Protecting internal data during standby Make sure that the voltage input to the CS (2) Timing 1. Connection to multiplexed bus type 2. Connection to Z80 or compatible CPU 3. Connection to 68-seriesMPU 1.RTC-72421 2.RTC-72423 ∆ fT θ T ∆ fV Frequency[x10-6] Supply Voltage(VDD) [V] 1. Notes on handling (1) Static electricity (2) Noise (3)Voltage levels of input pins (4) Handling of unused pins Distributor AMERICA EPSON ELECTRONICS AMERICA, INC HEADQUARTER 150 River Oaks Parkway, San Jose, CA 95134, U.S.A