Epson RTC-72421 A, RTC-72421 B, RTC-72423, RTC-72423 A Bi, 16, 11−, ALE, CS1, GND, N.C, tput, 15,2, 20,2, D0-D3, Input, Input, Input, Input, Input, STD.P, 22,23, Signal, Pin No, 14− 16, (ReaD), Output, 5, 7, 9

RTC - 72421 / 72423

„Terminal functions

Signal

Pin No.

Input/ou

Function

tput

RTC-72421

RTC-72423

Connect these pines to a bi-directional data bus or CPU data bus. Use this bus

to read to and write from the internal counter and registers.

CS1

CS0

RD

WR

Mode of D0 to D3

D0-D3

11−

14− 16, 19

Bi-

H

L

L

H

Output mode (read mode)

14

H

L

H

L

Input mode (write mode)

(Data bus)

direction

H

L

L

L

Do not use

L

H or L

High impedance (back-up mode)

H

H

H or L

High impedance (RTC not selected)

Address input pins used for connection to CPU address, etc. Used to select the

A0-A3

4−

7

5, 7, 9, 10

Input

RTC’s internal counter and registers (address selection).

(Address bus)

When the RTC is connected to a multiplexed-bus type of CPU, these pines can

also be used in combination with the ALE described below

Reads in address data and

state for internal latching.

CS0

When the ALE is high, the address data and

state is read into the RTC.

CS0

When the (through-mode) ALE falls, the address data and

state at that

CS0

ALE

point are held. The held address data and

status are maintained while

3

4

Input

CS0

(Address Latch Enable)

the ALE is low.

ALE

Address data and

CS0

status

H

Read into the RTC to set address data

L

Held in the RTC (latched at the trailing edge of the ALE)

If the RTC is connected to a CPU that does not have an ALE pin and thus there

is no need to use this ALE pin, fix it to VDD.

Writes the data on D0 to D3 into the register of the address specified by A0 to

WR

A3, at the leading edge of

.

10

13

Input

WR

(WRite)

Make sure that

RD

and

WR are never low at the same time.

Output data to D0 to D3 from the register at the address specified by A0 to A3,

RD

while

is

low.

8

11

Input

RD

(ReaD)

Make sure that

RD

and

WR are never low at the same time.

When CS1 is high and

is low, the RTC’s chip-select function is valid and

CS0

read and write are enabled.

When the RTC is connected to a multiplexed-bus type of CPU,

requires

CS1,

CS0

CS0

15,2

20,2

Input

the operation of the ALE (see the description of the ALE).

(Chip Select)

Use CS1 connected to a power voltage detection circuit. When CS1 is high, the

RTC is enabled; when it is low, the RTC is on standby.

When CS1 goes low, the HOLD and RESET bits in the RTC registers are

cleared to 0.

This is an N-channel open drain output pin.

Depending on the setting of the CE register, a fixed-period interrupt signal and a

pulse signal are output.

The output from this pin cannot be inhibited by the CS1 and

signals.

CS0

Use a load voltage that is less than or equal to VDD. If not using this pin, keep it

open-circuit.

An example of STD.P connection is shown below.

+5 V or VDD

STD.P

RTC

At least 2.2 kΩ

1

1

Output

(STanDard Pulse)

STD.P

If the STD.P output is not be used during standby operation, connecting the pull-

up resister to +5 V provides a reduction in current consumption. If the STD.P

output is to be used even during standby, connect the pull-up resistor to the

RTC’s VDD. In this case, the current consumption will be increased by the

amount of current flowing through the pull-up resistor.

VDD

18

24

Connect this pin to power source. Supply to 5 V ±

10 % to this pin during normal

operation; at least 2 V during battery back-up operation.

GND

9

12

Connect this pin to ground.

(VDD)

16, 17

22,23

These pins are connected internally to VDD. Leave them open circuit.

N.C.

−

3, 6, 8,

These pins are not connected internally. Ground them.

17, 18, 21

Page - 3 MQ - 162 - 03