FSA3357
DC Electrical Characteristics (Continued)
Note 4: Measured by the voltage drop between A and Bn pins at the indicated current through the switch. On Resistance is determined by the lower of the voltages on the two (A or Bn Ports).
Note 5: Parameter is characterized but not tested in production.
Note 6: RON = RON max RON min measured at identical VCC, temperature and voltage levels.
Note 7: Flatness is defined as the difference between the maximum and minimum value of On Resistance over the specified range of conditions.
AC Electrical Characteristics
Symbol | Parameter | VCC |
| TA = 25C |
| TA = 40C to 85C | Units | Conditions | Figure | |||
(V) | Min | Typ | Max | Min | Max | Number | ||||||
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tPHL | Propagation Delay | 1.65 | 1.95 |
| 2.0 |
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tPLH | Bus to Bus | 2.3 | 2.7 |
| 1.1 |
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| (Note 8) | 3.0 | 3.6 |
| 0.7 |
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| 4.5 | 5.5 |
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tPZL | Output Enable Time | 1.65 | 1.95 | 5.0 |
| 32.0 | 5.0 | 34.0 |
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tPZH | Turn on Time | 2.3 | 2.7 | 3.0 |
| 15.0 | 3.0 | 16.5 | ns | VI = 2 x VCC for tPZL | Figures | |
| (A to Bn) | 3.0 | 3.6 | 2.0 |
| 9.5 | 2.0 | 11.0 | VI = 0V for tPZH | 1, 2 | ||
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| 4.5 | 5.5 | 1.5 |
| 6.5 | 1.5 | 7.0 |
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tPLZ | Output Disable Time | 1.65 | 1.95 | 3.0 |
| 14.0 | 3.0 | 14.5 |
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tPHZ | Turn Off Time | 2.3 | 2.7 | 2.0 |
| 7.2 | 2.0 | 7.8 | ns | VI = 2 x VCC for tPLZ | Figures | |
| (A Port to Bn Port) | 3.0 | 3.6 | 1.5 |
| 5.1 | 1.5 | 5.5 | VI = 0V for tPHZ | 1, 2 | ||
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| 4.5 | 5.5 | 0.8 |
| 3.7 | 0.8 | 4.0 |
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Break Before Make Time | 1.65 | 1.95 | 0.5 |
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| (Note 9) | 2.3 | 2.7 | 0.5 |
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| Figure 3 | |
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| 3.0 | 3.6 | 0.5 |
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| 4.5 | 5.5 | 0.5 |
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Q | Charge Injection (Note 9) | 5.0 |
| 3.0 |
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| pC | CL = 0.1 nF, VGEN = 0V | Figure 4 | ||
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| 2.0 |
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| RGEN = 0 | ||||
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OIRR | Off Isolation (Note 10) | 1.65 | 5.5 |
| 58.0 |
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| dB | RL = 50 | Figure 5 | |
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| f = 10MHz | |||
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Xtalk | Crosstalk | 1.65 | 5.5 |
| 60.0 |
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| dB | RL = 50 | Figure 6 | |
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| f = 10MHz | |||
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BW | 3dB Bandwidth | 1.65 5.5 |
| 250.0 |
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| MHz | RL = 50 | Figure 9 | ||
THD | Total Harmonic Distortion |
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| RL = 600 |
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| (Note 9) | 5.0 |
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| f = 600 Hz to 20 KHz |
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Note 8: This parameter is guaranteed by design but not tested. The bus switch contributes no propagation delay other than the RC delay of the On Resistance of the switch and the 50 pF load capacitance, when driven by an ideal voltage source (zero output impedance).
Note 9: Guaranteed by Design.
Note 10: Off Isolation = 20 log10 [VA / VBn]
Capacitance (Note 11)
Symbol | Parameter | Typ | Max | Units | Conditions | Figure | |
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CIN | Control Pin Input Capacitance | 2.0 |
| pF | VCC = 0V |
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B Port Off Capacitance | 3.6 |
| pF | VCC = 5.0V | Figure 7 | ||
A Port Capacitance When Switch Is Enabled | 14.5 |
| pF | VCC = 5.0V | Figure 8 |
Note 11: TA = 25C, f = 1 MHz, Capacitance is characterized but not tested in production.
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