40
VF-16
SLAVE GR, MAIN PCB, VF-16P_D[0..7]
A[0..18]
A11
A10
CPU
/CS1
/CS1
/CS_GA2_M /CS_GA2_M
DGND
D+5
C56
0.01
C55
0.01DGND
D+5
DGND
SEL_CONT_L
SEL_CONT_R
SEL_CONT_L
SEL_CONT_R
DSP_SEL_A
DSP_SEL_B
DSP_SEL_C DSP_SEL_C
DSP_SEL_B
DSP_SEL_A
P_ON/OFF P_ON/OFF
F_SEL_A
F_SEL_B
F_SEL_A
F_SEL_B
D+5
/CS_ADAC1
/CS_ADAC2
/CS_ADAC1
/CS_ADAC2
1D 3
1Q
2
2D 4
2Q
5
3D 7
3Q
6
4D 8
4Q
9
5D 13
5Q
12
6D 14
6Q
15
7D 17
7Q
16
8D 18
8Q
19
CK 11
CLR 1
VCC
20
U38
74VHC273 D+5
D+5
DGND
GND DGND
CPU
GR
C3
A1
B2
G2A 4
G2B 5
G1 6
VCC 16
Y7
7Y6
9Y5
10 Y4
11 Y3
12 Y2
13 Y1
14 Y0
15 U37
74VHC138
A12
DGND
1
2
3
14
U41A
74VHC32
4
5
6
U41B
74VHC32
12
13
11
U41D
74VHC32
DGND
C85
0.01
DGND
D+5
CPU
CPU
CPU
/RD2
/WR
D[0..15]
/RST
A[0..18]
AD_D[1..5]
A[0..18]
D[0..15]
DA_D[5..8]
AD_D[1..5]
D+5
DGND
VDD 1
VSS 2
IORDY_O 3
CS_IDE 4
CS 5
A8 6
A7 7
A6 8
A5 9
A4 10
A3 11
A2 12
A1 13
A0 14
VSS 15
VSS 16
D15 17
VDD 18
D14 19
D13 20
D12 21
D11 22
D10 23
D9 24
D8 25
VSS 26
D7 27
D6 28
D5 29
D4 30
D3 31
D2 32
D1 33
D0 34
VDD 35
NC 36
NC
37
VSS
38
ATA_RES
39
ATA_D7
40
ATA_D8
41
ATA_D6
42
ATA_D9
43
VSS
44
ATA_D5
45
ATA_D10
46
ATA_D4
47
ATA_D11
48
ATA_D3
49
ATA_D12
50
ATA_D2
51
ATA_D13
52
ATA_D1
53
VDD
54
VDD
55
ATA_D14
56
ATA_D0
57
ATA_D15
58
DMARQ
59
DIOW
60
DIOR
61
IORDY_I
62
DMACK
63
VSS
64
VSS
65
INTRQ
66
ATA_A1
67
ATA_A0
68
ATA_A2
69
CS1FX
70
VSS
71
VDD
72
VDD
73
VSS
74
CS3FX
75
DMA_RD
76
DMA_WR
77
SCSI_CS
78
SCSI_INT
79
SCSI_DREQ
80
SCSI_A3
81
SCSI_A4
82
SCSI_A5
83
AD_DATA_12
84
AD_DATA_34
85
AD_DATA_56
86
AD_DATA_78
87
AD_DATA_LR
88
VSS
89
VDD
90
DA_DATA_12
91
DA_DATA_34
92
DA_DATA_56
93
DA_DATA_78
94
DA_DATA_LR
95
BCK
96
LRCK
97
MCLK
98
VSS
99
XO1
100
XI1
101
VDD
102
VSS
103
XO2
104
XI2
105
VDD
106
VSS
107
NC
108
NC 109
NC 110
SLAVE_MLRCK 111
SLAVE_MSCK 112
VARI_FS 113
VARI_256FS 114
VDD 115
VSS 116
EXT_MCLK1 117
PD1 118
FCONT1 119
PLL_SEL 120
PD2 121
FCONT2 122
EXT_MCLK2 123
TEST 124
DIGITAL_IN_1 125
DIGITAL_OUT_1 126
DIGITAL_IN_2 127
DIGITAL_OUT_2 128
VDD 129
TCK2 130
TST2 131
TCRC 132
SLAVE 133
RST 134
ATA_DREQ 135
VSS 136
DACK_I 137
MLRCK 138
ATA_INT 139
NC 140
RD 141
WR 142
VSS 143
VDD 144
U4
GA2
C91
10/16
C925
0.01
C926
0.01
C927
0.01
C928
0.01
C929
non
/WR
/RD2
/RST
12 34 56 78 R923
100x4
AD_D1
AD_D2
AD_D3
AD_D4
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
D12
D13
D14
D15
A1
A2
A3
A4
A5
A6
A7
A8
A9
/CS_GA2_S
P_D0
P_D1
P_D2
P_D3
P_D4
P_D5
P_D6
P_D7
P_D0
P_D1
P_D2
P_D3
P_D4
P_D5
P_D6
P_D7
MLRCK
MSCK
VDD
1
DSP_SO1
2
DSP_SO2
3
DSP_SO3
4
DSP_SO4
5
KEY_SO
6
nRST_DSP1
7
nRST_DSP2
8
nRST_DSP3
9
nRST_DSP4
10
nWRQ1
11
nWRQ2
12
nWRQ3
13
nWRQ4
14
SCLK1
15
SCLK2
16
SCLK3
17
SCLK4
18
DSP_SI
20
KEY_SI
21
nRST_DSP
22
nWRQ
23
SCLK
24
SI 27
VDD
25
SO 28
DSP_SEL_A 29
DSP_SEL_B 30
DSP_SEL_C 31
/RST 32
ADD_IN1A
77
ADD_IN1B
78
ADD_IN1C
79
ADD_IN2A
80
ADD_IN2B
81
ADD_IN2C
82
ADD_IN3A
83
ADD_IN3B
84
ADD_IN3C
85
ADD_OUT1
86
ADD_OUT2
87
ADD_OUT3
88
89
90
91
SEL_CONT1L
92
SEL_CONT1R
93
SEL_CONT2L
94
SEL_CONT2R
95
SEL_CONT3L
96
SEL_CONT3R
97
SEL_CONT4L
98
SEL_CONT4R
99
VSS
100
VSS
76
VDD 51
VDD 75
VSS 26
VSS 50
BCK32_IN4 45
BCK32_OUT1 53
BCK32_OUT2 54
BCK32_OUT3 55
BCK32_OUT4 56
BCK32_OUT5 57
BCK64_IN5 58
BCK64_IN4 59
BCK64_IN3 60
BCK64_IN2 61
BCK64_IN1 62
SEL_OUT1 63
SEL_OUT2 64
SEL_OUT3 65
SEL_OUT4 66
SEL_IN1A 67
SEL_IN1B 68
SEL_IN2A 69
SEL_IN2B 70
SEL_IN3A 71
SEL_IN3B 72
SEL_IN4A 73
SEL_IN4B 74
SCLK_KEY
19
RDY_DSP 33
RDY_DSP1 34
RDY_DSP2 35
RDY_DSP3 36
RDY_DSP4 37
BCK64 47
FS64OUT 48
BCK64_OUT1 38
BCK64_OUT2 39
BCK64_OUT3 40
BCK64_OUT4 41
BCK32_IN1 42
BCK32_IN2 43
BCK32_IN3 44
LRCK 52
BCK32 46
FS256 49
U911
SAA
D+5
DGND
C933
0.01
C934
0.01
C931
0.01
C932
0.01
DGND
D+5
DA_D5
DA_D6
DA_D7
DA_D8
12 34 56 78
R921
100x4
DA_D5
DA_D6
DA_D7
DA_D8
BCK64
BCK
LRCK
SIN2_[1..4]
SIN1_[1..4]
SIN1_[1..4]
SIN2_[1..4]
SIN2_1
SIN2_2
SIN2_3
SIN2_4
SIN1_1
SIN1_2
SIN1_3
SIN1_4
C86
0.01
1D 3
1Q
2
2D 4
2Q
5
3D 7
3Q
6
4D 8
4Q
9
5D 13
5Q
12
6D 14
6Q
15
7D 17
7Q
16
8D 18
8Q
19
CK 11
CLR 1
VCC
20
U42
74VHC273 D+5
D+5
DGND
P_D0
P_D1
P_D2
P_D3
P_D4
P_D5
P_D6
P_D7
IN_SEL_L1
IN_SEL_L2
IN_SEL_L3
IN_SEL_L4
IN_SEL_R1
IN_SEL_R2
IN_SEL_R3
IN_SEL_R4
C930
470p
DGND
C935
470p
DGND
12 34 56 78
R922
100x4
TRK_D5
TRK_D6
TRK_D7
TRK_D8
DSP
DSP
DSP
DSP
DSP
CPU
POWER
GR
GR
/WR
AUX_DOUT[1..3]
AUX_DOUT
ST_ADD
ST_DIN
AUX_DOUT[1..3]
AUX_DOUT
ST_DIN
ST_ADD 12
34
56
78
R924 100x4
DSP
DSP
SIN1_1
SIN1_2
SIN1_3
SIN1_4
AUX_DOUT1
AUX_DOUT2
AUX_DOUT3
DGND
DGND
GR
1
23
14
U43A
74VHC08
4
56
U43B
74VHC08
9
10 8
U43C
74VHC08
12
13 11
U43D
74VHC08
C870.01
LRCK
DGND
D+5
SIN_SEL1
SIN_SEL2
SIN_SEL3
SIN_SEL4
SIN_SEL[1..4]
CPU SIN_SEL[1..4]
/CS_EXT
R925
non
C936
non
DGND
/CS_EXT1
/CS_EXT2
BCK
MSCK
BCK64
MLRCK
R926
0
/DIOW_EXT
D+5
W902
0
W901
non
DATA OUT(OPT)
D+5
DGND
1
2
3
4
5
6
J4
GPIF38T2
C20
0.01
R927
100
AD_D5