Fujitsu CM71-00101-5E - page 309

285
INDEX
N
NMIRelation of Step Trace Traps to "NMI" and External
Interrupts.............................................. 47
No Operation
NOP (No Operation)................. ....................... 237
Non-delayed Branching Instructions
Examples of Processing Non-delayed Branching
Instructions........................................... 60
Overview of Branching with Non-delayed Branching
Instructions........................................... 58
Non-maskable Interrupt
Conditions for Acceptance of Non-maskable Interrupt
Requests............................................... 40
Operation Following Acceptance of a Non-maskable
Interrupt............................................... 40
Time to Start of Non-maskable Interrupt Processing
............................................................ 40
Non-maskable Interrupts
"PC" Values Saved for Non-maskable Interrupts
............................................................ 41
How to Use Non-maskable Interrupts................... 41
Overview of Non-maskable Interrupts.................. 40
NOP
NOP (No Operation)................. ....................... 237
O
Operand
Use of Operand Information Contained in Instructions
.............................................................. 7
OR OR (Or Word Data of Source Register to Data in
Memory).............................................. 93
OR (Or Word Data of Source Register to Destination
Register) .............................................. 92
Or Byte Data
ORB (Or Byte Data of Source Register to Data in
Memory).............................................. 97
Or Condition Code
ORCCR (Or Condition Code Register and Immediate
Data).................................................. 239
Or Half-word Data
ORH (Or Half-word Data of Source Register to Data
in Memory)........ .................................. 95
Or Word Data
OR (Or Word Data of Source Register to Data in
Memory).............................................. 93
OR (Or Word Data of Source Register to Destination
Register) .............................................. 92
ORB
ORB (Or Byte Data of Source Register to Data in
Memory).............................................. 97
ORCCR
ORCCR (Or Condition Code Register and Immediate
Data)................................ ..................239
ORH
ORH (Or Half-word Data of Source Register to Data
in Memory)...........................................95
P
PC "PC" Values Saved for "INT" Instruction Execution
............................................................45
"PC" Values Saved for "INTE" Instruction Execution
............................................................46
"PC" Values Saved for Coprocessor Error Traps
............................................................49
"PC" Values Saved for Coprocessor Not Present Traps
............................................................48
"PC" Values Saved for Interrupts .........................39
"PC" Values Saved for Non-maskable Interrupts
............................................................41
"PC" Values Saved for Step Trace Traps...............47
"PC" Values Saved for Undefined Instruction
Exceptions............................... .............43
Pipeline
How to Avoid Mismatched Pipeline Conditions ....55
Overview of Pipeline Operation...........................54
Precautionary Information for Interrupt Processing in
Pipeline Operation................................. 55
Priority
Priority of Multiple Processes..............................52
Priority of Simultaneous Occurrences...................51
Reset Priority Level........................ ....................33
Program Counter
Overview of the Program Counter........................18
Program Counter Functions................. ................18
Program Status Register
LD (Load Word Data in Memory to Program Status
Register).............................................157
MOV (Move Word Data in Program Status Register to
Destination Register)............................180
MOV (Move Word Data in Source Register to
Program Status Register)......................182
Overview of Program Status Register................... 19
Program Status Register Configuration................. 19
ST (Store Word Data in Program Status Register to
Memory).............................................171
Unused Bits in the Program Status Register...........19
PS Register
Note on PS Register............................................22
R
Register
Configuration of the "MD" Register........ .............30