568
APPENDIX
APPENDIX A I/O Maps
Table A-1 lists addresses to be assigned to the registers in the peripheral blocks.
I/O Maps (00XX Addresses)
Table A-1 I/O Map (1/5)
Address Register Abbreviation Access Peripheral Initial value
000000H to
000001HReserved
000002HPort 2 data register PDR2 R/W Port 2 XXXXXXXXB
000003HReserved
000004HPort 4 data register PDR4 R/W Port 4 XXXXXXXXB
000005HPort 5 data register PDR5 R/W Port 5 XXXXXXXXB
000006HPort 6 data register PDR6 R/W Port 6 XXXXXXXXB
000007HReserved
000008HPort 8 data register PDR8 R/W Port 8 XXXXXXXXB
000009H to
00000AHReserved
00000BHAnalog input enable port 5 ADER5 R/W Port 5, A/D 1 1 1 1 1 1 1 1B
00000CHAnalog input enable port 6 ADER6 R/W Port 6, A/D 1 1 1 1 1 1 1 1B
00000DHReserved
00000EHInput level select register0 ILSR0 R/W Ports XXXXXXXXB
00000FHInput level select register1 ILSR 1 R/W Ports XXXXXXXXB
000010HReserved
000011H
000012HPort 2 direction register DDR2 R/W Port 2 0 0 0 0 0 0 0 0B
000013HReserved
000014HPort 4 direction register DDR4 R/W Port 4 XXX 0 0 0 0 0B
000015HPort 5 direction register DDR5 R/W Port 5 0 0 0 0 0 0 0 0B
000016HPort 6 direction register DDR6 R/W Port 6 0 0 0 0 0 0 0 0B
000017HReserved
000018HPort 8 direction register DDR8 R/W Port 8 0 0 0 0 0 0 X 0B