Model 8663A | Service |
SERVICE SHEET 14
A5A3
REFERENCEBLOCK DIAGRAM 4
Table
After Adjustments or Repairs
Table
PRINCIPLES OF OPERATION
General
The purpose of the
dwelwpthe FN Loop Error Voltage which is used to tune the VCO.
This FN Loop Error Voltage (tuning voltage) is developed by
integrating currents from the Phase Detector circuit, the
Bias Sink circuit.These currents are integrated together by the
Current Summing Amplifier to develop a voltage. The Sample and Hold
circuit samples the voltage output from the Current Summing Amplifier once each reference period and at the same time during each reference
period. The sampled voltage becomes the FN Loop Error Voltage.
When the
voltage must be a constant dc value, This means the voltage output
from the Current Summing Amplifier must be the same at every sample
period. In order to meet this condition the total of the currents
being integrated must be the same each reference period. To look at it another way, the currents entering the summing node must equal the
currents leaving the summing node in order for the tune voltage to
remain constant. This concept, that when the FN Loop is
currents leaving the node is true for aI1 conditiwns, that is, for
the condition when the loop runs without a fractional part and for
the condition when it has a fractional part. The difference is that
when the loop operates with no fractional part the output from the
Phase Detector ci,rcuit remains constant. However, when the loop
operates with a fractional part, the output from the Phase Detector
circuit no longer remains constant but varies from reference period
to reference period. To compensate for the changing phase detector
output the outputs from the
Detector circuit supplies less current to the summing node, the
Phase Detector
The Phase Detector consists of a pair of
a pulse width proportional to the phase difference betw@en its two
input signals, the FN Loop IF (VCO/N) and the FN Loop PM Det
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