Input/Output Interfaces
5.5.3 Extended Capabilities Port Mode
The Extended Capabilities Port (ECP) mode, like EPP, also uses a hardware
Ten control registers are available in ECP mode to handle transfer operations. In accessing the control registers, the base address is determined by address lines
The ECP mode includes several
5.5.4 Parallel Interface Programming
Programming the parallel interface consists of configuration, which typically occurs during POST, and control, which occurs during runtime.
Parallel Interface Configuration
The parallel interface must be configured for a specific address range (LPT1, LPT2, etc.) and also must be enabled before it can be used. When configured for EPP or ECP mode, additional considerations must be taken into account. Address selection, enabling, and EPP/ECP mode parameters of the parallel interface are affected through the PnP configuration registers of the SCH5317 I/O controller. Address selection and enabling are automatically done by the BIOS during POST but can also be accomplished with the Setup utility and other software.
The parallel interface configuration registers are listed in the following table:
Table
Parallel Interface Configuration Registers
Index |
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Address | Function | R/W | Reset Value |
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30h | Activate | R/W | 00h |
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60h | Base Address MSB | R/W | 00h |
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61h | Base Address LSB | R/W | 00h |
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70h | Interrupt Select | R/W | 00h |
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74h | DMA Channel Select | R/W | 04h |
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F0h | Mode Register | R/W | 00h |
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F1h | Mode Register 2 | R/W | 00h |
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