In order of introduction:
The Internal Coupling Facility (ICF) processor was intro- duced to help cut the cost of Coupling Facility functions by reducing the need for an external Coupling Facility.
IBM System z Parallel Sysplex® technology allows for greater scalability and availability by coupling mainframes together. Using Parallel Sysplex clustering, System z serv- ers are designed for up to 99.999% availability.
The Integrated Facility for Linux (IFL) processor offers sup- port for Linux® and brings a wealth of available applications that can be run in a real or virtual environment on the z10 EC. An example is the z/VSE™ strategy which supports integration between the IFL, z/VSE and Linux on System z to help customers integrate timely production of z/VSE data into new Linux applications, such as data warehouse envi- ronments built upon a DB2® data server. To consolidate dis- tributed servers onto System z, the IFL with Linux and the System z virtualization technologies fulfi ll the qualifi cations for
Available on System z since 2004, the System z10 Applica- tion Assist Processor (zAAP) is designed to help enable strategic integration of new application technologies such as Java™
The System z10 Integrated Information Processor (zIIP) is designed to support select data and transaction process- ing and network workloads and thereby make the consoli- dation of these workloads on to the System z platform more cost effective. Workloads eligible for the zIIP (with z/OS
V1.7 or later) include remote connectivity to DB2 to help support these workloads: Business Intelligence (BI), Enter- prise Relationship Management (ERP), Customer Relation- ship Management (CRM) and Extensible Markup Language (XML) applications. In addition to supporting remote connectivity to DB2 (via DRDA® over TCP/IP) the zIIP also supports DB2 long running parallel
The new capability provided with
to offl oad z/OS system software overhead, such as DB2 workloads on zIIPs, and to offer an economical Java exe- cution environment under z/OS on zAAPs, all in the same z/VM LPAR.
Numerical computing on the chip
Integrated on the z10 EC processor unit is a Hardware Decimal Floating Point unit to accelerate decimal fl oating point transactions. This function is designed to markedly improve performance for decimal fl oating point operations which offer increased precision compared to binary fl oating
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