Mode: asynchronous or synchronous

„Description

The dx_mreciottdata( ) function records voice data from two TDM bus time slots. The data may be recorded to a combination of data files, memory or custom devices.

This function is used for the transaction record feature, which allows you to record two TDM bus time slots from a single channel. Voice activity on two channels can be summed and stored in a single file, device, and/or memory.

Parameter

Description

devd

specifies the valid channel device handle on which the recording is to occur.

 

The channel descriptor may be that associated with either of the two TDM bus

 

transmit time slots or a third device also connected to the TDM bus.

iotp

points to the I/O Transfer Table Structure, DX_IOTT, which specifies the

 

order of recording and the location of voice data. For more information on this

 

structure, see the DX_IOTT data structure.

tptp

points to the Termination Parameter Table Structure, DV_TPT, which

 

specifies the termination conditions for recording. For more information on

 

this structure, see the DV_TPT data structure.

xpb

points to a DX_XPB structure, which specifies the file format, data format,

 

sampling rate, and resolution for I/O data transfer. For more information on

 

this structure, see the DX_XPB data structure.

mode

specifies the attributes of the recording mode. One or more of the following

 

values can be specified:

 

• 0 – standard record mode

 

• RM_TONE – transmit a 200 msec tone before initiating record

sc_tsinfop

points to the SC_TSINFO data structure and specifies the TDM bus transmit

 

time slot values of the two time slots being recorded.

 

In the SC_TSINFO structure, sc_numts should be set to 2 for channel

 

recording and sc_tsarrayp should point to an array of two long integers,

 

specifying the two TDM bus transmit time slots from which to record.

Note: When using RM_TONE bit for tone-initiated record, each time slot must be “listening” to the transmit time slot of the recording channel; the alert tone can only be transmitted on the recording channel’s transmit time slot.

After dx_mreciottdata( ) is called, recording continues until one of the following occurs:

•dx_stopch( ) is called on the channel whose device handle is specified in the devd parameter

•the data requirements specified in the DX_IOTT structure are fulfilled

•one of the conditions for termination specified in the DV_TPT structure is satisfied

„Cautions

•All files specified in the DX_IOTT structure are of the file format specified in DC_XPB.

•All files recorded will have the same data encoding and rate as DC_XPB.

HMP Linux 1.2 Release Update, Rev 05 — September 2006September 2006

35

Page 34 Page 36
Page 35
Image 35
Intel 05-2352-005 manual „ Description, „ Cautions
Page 34 Page 36

05-2352-005 specifications

The Intel 05-2352-005 is a versatile and powerful microprocessor designed to cater to various computing needs across different industries. Launched in the early 2000s, this processor has gained recognition for its reliability and performance, making it a popular choice among system builders and IT professionals.

One of the main features of the Intel 05-2352-005 is its multi-core architecture, which allows for efficient multitasking and improved processing power. With multiple cores working simultaneously, users can run multiple applications without noticeable slowdowns, ensuring a seamless computing experience. This characteristic is particularly valuable in environments that demand high levels of parallel processing, such as video editing, gaming, or data analysis.

The processor employs Intel's advanced 64-bit architecture, which enhances memory management capabilities compared to its 32-bit predecessors. This feature allows systems utilizing the 05-2352-005 to access larger amounts of RAM, thereby boosting performance and enabling the execution of memory-intensive tasks. With support for advanced instruction sets, including SSE2 and SSE3, the processor is well-equipped to handle modern applications with higher computational demands.

Thermal management is another critical aspect of the Intel 05-2352-005. It is built with energy efficiency in mind, featuring enhancements that help maintain optimal operating temperatures while reducing power consumption. This is particularly advantageous in environments where energy costs are a concern or where heat dissipation is critical.

In terms of compatibility, the Intel 05-2352-005 supports a wide range of chipsets, allowing it to fit into various motherboard configurations easily. This flexibility makes it an appealing option for both pre-built system manufacturers and custom PC builders alike.

Security features are also integrated into the Intel 05-2352-005, with support for technologies such as Intel Trusted Execution Technology (TXT). This enhances the security of systems by providing a hardware-based foundation for protecting sensitive information against various threats.

Overall, the Intel 05-2352-005 microprocessor stands out for its balance of performance, efficiency, and security. Its multi-core architecture, 64-bit support, and energy-efficient design make it a reliable choice for a multitude of applications, continuing to serve users well in diverse computing environments even years after its release.
Top Page Image Contents