Schematic Diagrams
CPU - 2 of 3 B - 5
B.Schematic Diagrams
CPU - 2 of 3Sheet 4 of 43
Yonah CPU 2 of 3
H_BPM4#
H_ITPCLK#
Z0415
R39 62_1%_06
H_D#17
H_D#15
H_D#19
Z0411
VTT_OL
V_THRM
H_D#43
H_D#47
H_DSTBP1#6H_DSTBP3#6
H_D#13
H_D#49
H_D#26
H_D#51
H_BPM0#
R9 0_04
Z0407
MCH_BSEL2
H_D#18
H_D#6
R68 *0_04
H_DBI1#6
MCH_BSEL17
R65 51.1_1%_04
R63 51.1_1%_04
CPU_BSEL0
H_D#37
H_D#62
H_D#27
H_BPM5#
H_DSTBN2#6
H_D#14
H_DSTBP0#6H_DSTBP2#6
H_TMS
VTT_1.2VS3,5,6,7,10,18,36,37
H_D#55
H_TDO
H_D#48
H_D#33
SYS_RST1#
H_D#12
H_D#21
H_D#16
R64 51.1_1%_04
R5
*10K_04
H_D#10
H_D#61
C34
1000p_X7R_04
0927
VTT_OR3
MCH_BSEL1
Route H_THERMDA and
H_THERMDC on same layer.
10 mil trace on 10 mil
spacing.
TEST
R135 10K_04
H_D#41
H_TCK H_D#[63:0]6
R26
10K_04
VTT_OR
Z0401
VTT_OR
CPU_ITPCLK#2
H_D#63
C783 0.1u_X7R_04
R621
*0_04
H_D#59
R133 10K_04
Q2
2N7002
G
DS
R3
4.7K_04
C35 0.01u_16V_04
Z0409
Z0406
THERM_RST#25
MCH_BSEL07
H_D#53
Z0402
4 OF 8
LGA775_C
U3D
75319-0115
B4
C5
A4
C6
A5
B6
B7
A7
A10
A11
B10
C11
D8
B12
C12
D11
A8
C8
B9
G9
F8
F9
E9
D7
E10
D10
F11
F12
D13
E13
G13
F14
G14
F15
G15
G11
G12
E12
G16
E15
E16
G18
G17
F17
F18
E18
E19
F20
E21
F21
G21
E22
D22
G22
D19
G20
G19
D20
D17
A14
C15
C14
B15
C18
B16
A17
B18
C21
B21
B19
A19
A22
B22
C20
A16
C17
D<0>*
D<1>*
D<2>*
D<3>*
D<4>*
D<5>*
D<6>*
D<7>*
D<8>*
D<9>*
D<10>*
D<11>*
D<12>*
D<13>*
D<14>*
D<15>*
DB1<0>*
DSTBN<0>*
DSTBP<0>
D<16>*
D<17>*
D<18>*
D<19>*
D<20>*
D<21>*
D<22>*
D<23>*
D<24>*
D<25>*
D<26>*
D<27>*
D<28>*
D<29>*
D<30>*
D<31>*
DB1<1>*
DSTBN<1>*
DSTBP<1>
D<32>*
D<33>*
D<34>*
D<35>*
D<36>*
D<37>*
D<38>*
D<39>*
D<40>*
D<41>*
D<42>*
D<43>*
D<44>*
D<45>*
D<46>*
D<47>*
DBI<2>*
DSTBN<2>*
DSTBP<2>
D<48>*
D<49>*
D<50>*
D<51>*
D<52>*
D<53>*
D<54>*
D<55>*
D<56>*
D<57>*
D<58>*
D<59>*
D<60>*
D<61>*
D<62>*
D<63>*
DBI<3>*
DSTBN<3>*
DSTBP<3>
H_D#34
VTT_OR
H_D#29
H_D#22
H_D#28
H_D#[63:0]6
Z0413
R11 47_04
Z0417
C24 0.1u_X7R_04
R31 0_04
H_D#[63:0]6
H_TDI
CPU_BSEL1
VDD3
VRM_PWRGD30,37
H_D#25
R42 62_1%_06
C11 10u_10V_08
H_D#42
C23 0.01u_16V_04
U1
ADM1032ARM
1
2
3
4
5
6
7
8
VDD
D+
D-
THERM
GND
ALERT
SDATA
SCLK
H_D#56
R141 470_04
CPU_BSEL22
H_D#9
R74
1K_1%_04
3.3V7,14,16,17,18,21,22, 24,26,30,31,34,36
H_BPM1#
H_D#39
H_D#2
VTT_SEL
Z0403
H_D#24
C15 10u_10V_08
H_ITPCLK
Z0410
R10
100K_04
H_D#35
CPU_BSEL0
H_DBI2#6
CPU_BSEL02
H_D#57
H_TRST#
CPU_ITPCLK2
3 OF 8
LGA775_C
U3C
75319-0115
AE1
AD1
AF1
AC1
AG1
AJ2
AJ1
AD2
AG2
AF2
AG3
AC2
AK3
AJ3
G29
H30
G30
N5
C9
E7
AE6
D16
A20
E23
A29
B25
B29
B30
C29
A26
B27
C28
A25
A28
A27
C30
A30
C25
C26
C27
B26
D27
D28
D25
D26
B28
D29
D30
AM6
AA1
J1
F27
F23
D14
E6
E5
J3
D1
TCK
TDI
TDO
TMS
TRST*
BPM<0>*
BPM<1>*
BPM<2>*
BPM<3>*
BPM<4>*
BPM<5>*
DBR*
ITPCLK<0>
ITPCLK<1>
BSEL<0>
BSEL<1>
BSEL<2>
SPARE0
SPARE1
SPARE2
SPARE4
NC_DSS2
NC_DSS3
NC
VTT_1
VTT_2
VTT_3
VTT_4
VTT_5
VTT_6
VTT_7
VTT_8
VTT_9
VTT_10
VTT_11
VTT_12
VTT_13
VTT_14
VTT_15
VTT_16
VTT_17
VTT_18
VTT_19
VTT_20
VTT_21
VTT_22
VTT_23
VTT_24
VTT_PWRGD
VTT_OUT_1
VTT_OUT_2
VTT_SEL
EXTBGREF
SFRANAD
SFRANAC
DCLKPH
ACLKPH
HFPLL
H_D#40
H_D#46
VTT_1.2VS
Z0408
THERMAL_ALERT#25
Z0404
C17
1u_10V_06
VTT_OR
H_DSTBN0#6
R30 51.1_1%_04
H_D#58
R19 51.1_1%_04
Near to Thermal
IC
1130
H_THERMDC3
H_D#1
VDD313,1 5,21,25,31,32
C20 0.1u_X7R_04
H_D#54
VTT_OL
CPU_BSEL12
CPU_BSEL2
H_DSTBN1#6
H_D#8
SMD_THERM25
SYS_RST#17
H_D#4
H_D#60
H_D#30
MCH_BSEL0
H_D#20
H_D#[63:0]6
H_D#45
H_D#7
H_BPM3#
Layout Note:
R46 51.1_1%_04
Layout Note:
H_D#32
R136 470_04
H_DBI0#6
VTT_OL3
H_D#5
Z0412
R622 0_04
3.3V
Z0405
R8 100K_04
C21 0.01u_16V_04
H_D#31
R62 51.1_1%_04
R18 51.1_1%_04
R134 10K_04
H_D#52
H_D#23
R142 470_04
VTT_OL
H_D#44
R35 62_1%_06
VTT_1.2VS
3.3V
H_D#50
R4
4.7K_04
R623 *0_04
R67 *0_04
1212
H_D#3
Z0414
Q3
NDS352AP_NL
G
DS
H_DBI3#6
SMC_THERM25
H_D#36
CPU_BSEL2
Z0416
H_D#0
H_D#38
H_DSTBN3#6
3.3VS2,7,10,11,12,13,14, 15,16,17,18,19,20,21,23,24,25,26,28,29,30,31,37
R647
20K_1%_04
H_THERMDA3
MCH_BSEL27
H_D#11
CPU_BSEL1
H_BPM2#