Kenwood TK-7160 PLL Frequency Synthesizer

TK-7160

■ Wide/Narrow Switching Circuit

The Wide port (pin 23) and Narrow port (pin 22) of the CPU

is used to switch between ceramic filters. When the Wide

port is high, the ceramic filter SW diodes (D332, D331) cause

CF301 to turn on to receive a Wide signal.

When the Narrow port is high, the ceramic filter SW di-

odes (D332, D331) cause CF302 to turn on to receive a Nar-

row signal.

Fig. 3 Wide/Narrow switching circuit

Narrow

IC101 22pin

IF_IN MIX_O

IC321

IF System

CF302

(Narrow)

CF301

(Wide)

R335

R334

R332

R333

D332 D331

Wide

IC101

23pin

■ AF Signal System

The detection signal from IF IC (IC321) goes to D/A con-

verter (IC201) to adjust the gain and is output to AQUA IC

(IC241) for characterizing the signal. The AF signal output

from IC241 and the DTMF/MSK signal, BEEP signal are

summed and the resulting signal goes to the D/A converter

(IC201). The AFO output level is adjusted by the D/A con-

verter. The signal output from the D/A converter is input to

the audio power amplifier (IC281). The AF signal from IC281

switches between the internal speaker and speaker jack (J1)

output.

Fig. 4 AF signal system

AQUA

D/A

CONV.

D/A

CONV.

IC201 IC241 IC201

W/NO AF PA

IC281 SP

IF IC

IC321

■ Squelch Circuit

The detection output from the FM IF IC (IC321) passes

through a noise amplifier (Q301) to detect noise. A voltage is

applied to the CPU (IC101). The CPU controls squelch ac-

cording to the voltage (SQIN) level. The signal from the RSSI

pin of IC321 is monitored. The electric field strength of the

receive signal can be known before the SQIN voltage is input

to the CPU, and the scan stop speed is improved.

Fig. 5 Squelch circuit

Q301

NOISE AMP D301IC321 IC101

AFO

RSSI

DET

CPU

SYSTEM

SQIN

RSSI

PLL Frequency Synthesizer

The PLL circuit generates the first local oscillator signal for

reception and the RF signal for transmission.

■ PLL

The frequency step of the PLL circuit is 5 or 6.25kHz. A

16.8MHz reference oscillator signal is divided at IC401 by a

fixed counter to produce the 5 or 6.25kHz reference fre-

quency. The voltage controlled oscillator (VCO) output signal

is buffer amplified by Q446, then divided in IC401 by a dual-

module programmable counter. The divided signal is com-

pared in phase with the 5 or 6.25kHz reference signal in the

phase comparator in IC401. The output signal from the

phase comparator is filtered through a low-pass filter and

passed to the VCO to control the oscillator frequency. (See

Fig. 6)

■ VCO

The operating frequency is generated by Q444 in transmit

mode and Q441 in receive mode. The oscillator frequency is

controlled by applying the VCO control voltage, obtained

from the phase comparator, to the varactor diodes (D443 and

D444 in transmit mode and D441 and D442 in receive mode).

The TX/RX pin is set low in receive mode causing Q443 and

Q442 to turn Q444 off, and turn Q441 on. The TX/RX pin is

set high in transmit mode. The outputs from Q441 and Q444

are amplified by Q446 and sent to the RF amplifiers.

Fig. 6 PLL circuit

D443,444

Q444

TX VCO

Q446

BUFF

AMP

D441,442

Q441

RX VCO

Q442,443

T/R SW

Charge

pump

LPF

Phase

comparator

1/M

1/N 5kHz/6.25kHz

5kHz/6.25kHz

REF

OSC

16.8MHz

PLL

DATA

IC401 : PLL IC

Q431

AMP

CIRCUIT DESCRIPTION