3. Power Block Diagram

3. Power Block Diagram

 

 

1.5V DDR

 

 

3A

3.5V

MICOM(VDD)

 

IR A'ssy

 

 

 

1.23V

2A

MTK (DDRV)

DDR(VDD)

DDR(VDDQ)

3.5V TUNER(+1.23V)

HDMI_EEPROM

RGB_EEPROM

CI (+5V_CI_ON)

5V Normal

TUNER(+5V_TU)

3.3V DAC

 

 

3A

 

 

MTK(AVDD33_DAC)

 

 

 

 

 

 

12V

PANEL_VCC

+12V_LNB

PANEL_POWER

LNB option

 

NTP_7400(PVDD1)

NTP_7400(PVDD2)

24V

AMP

5V USB 3A

 

1.2V Core

6A

3.3V Noraml

4A

5V USB

1CH DCDC 4A 2CH OCP 1.2A

Manual background USB1(DVR Max 1.5A)

MTK(AVDD12_LVDS)

MTK(AVDD_)

MTK(VCCK)

Manual background USB_WIFI

USB2(Max 1.2A)

USB3(Max 1.2A)

1.8V_TU

SPDIF

IR A'ssy

M_REMOTE

HDCP EEPROM

NVRAM

MTK (DVDD3V3)

MTK (AVDD33_AADC)

MTK (AVDD3V3)

MTK(AVDD3V3_MEMPLL

MTK(AVDD3V3_LVDS)

MTK(AVDD33_STB)

AUDIO AMP

EARPHONE AMP

EMMC(VCC)

EMMC(VCCQ)

TUNER(+3.3V_TU)

Copyright © 2013 LG Electronics. Inc. All rights reserved.

LGE Internal Use Only

Only for training and service purposes

 

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LG Electronics 32LA62**-Z* service manual Power Block Diagram, 3.5V