TDSQ-

4. Tuner/CI Block Diagram

TDSQ-

G501D

[+3.3V_S2_DEMOD] 32

[+3.3V_TUNER] 5

[+.1.8V_TUNER] 7

+3.3V_D_Demod

+3.3V_TU

+1.8_TU

+1.23V_D_Demod

+3.3V_NORMAL

3.3K Ω

CI Slot

[+1.23V_S2_DEMOD] 30

[S2_F22_OUTPUT] 33

[LNB] 36

[S2_SCL] 34

[S2_SDA] 35

[RESET] 2

[SLC] 3

[SDA] 4

[ERROR] 16 [SYNC] 17 [VALID] 18 [MCLK] 19

[D0-7] 20-27

[S2_RESET] 31

LNB_TX

LNB_OUT

22 Ω

I2C_SCL4

I2C_SDA4

/TU_RESET1

33Ω

33 Ω

IC2_SDA6

IC2_SCL6

FE_DEMOD1_TS_SYNC

FE_DEMOD1_TS_VAL

FE_DEMOD1_TS_CLK

FE_DEMOD1_TS_DATA [0-7]

/S2_RESET

10 [TONECTRL]

LNB

2 [LNB]

IC6900

 

7 [SCL] A8303SESTR-TB

8 [SDA]

 

LGE 2122

 

 

 

 

 

F28[TCON12]

 

 

L33[SPI_CLK]

AP6

[SCL3]

 

 

AR6 [SDA3]

 

 

L30[SPI_CLK1]

 

 

 

 

AG24 [ADIN6_SRV]

 

M27[PVR_TS_VAL]

AF19[OPCTRL1]

 

M31[CI_TSCLK]

AJ19 [OPCTRL0]

 

 

 

 

R29 [DEMOD_TSSYNC]

 

N34[SPI_DATA]

 

 

N35[SPI_CLE]

P27 [DEMOD_TSVAL]

 

 

 

 

 

 

P30 [DEMOD_TSCLK]

 

 

 

 

 

 

 

 

[GPIO0-14]

 

 

 

 

[GPIO26-33]

 

 

 

T34[DEMOD_RST]

[DEMOD_TSDATA0-7]

P34[PVR_TSDATA1]

 

 

 

 

 

 

 

 

N36[CI_INT]

 

 

P33[PVR_TSDATA0]

AM18 [ADIN7_SRV]

 

R36[CI_TSVAL]

 

R37[CI_TSSYNC]

 

 

 

PCM_5V_CTL

CI 5V

+5V_CI_ON

 

Power detect

 

 

+5V_CI_ON

+3.3V_NORMAL

 

10K Ω

47K Ω

/CI_CD1

/CI_CD2 CI_VS1

/PCM_CE1 /PCM_CE2 /PCM_IOWR /PCM_IORD

CI_ADDR[0-14]

CI_A_ADDR[0-14]

CI_DATA[0-7]

CI_A_DATA[0-7]

 

PCM_RST

 

/PCM_WAIT

 

PCM_INPACK

 

/PCM_A_REG

 

/PCM_IRQA

 

/PCM_OE

 

/PCM_WE

VCC

CI_DET1

CI_DET2

VS1

CARD_EN1 CARD_EN2

IOWD

IORD

ADDR[0-14] DAT[0-7]

CI_RESET

CI_WAIT

INPACK REG /IRQA O_EN WR_EN

[T/C_DIF[P]] 10 [T/C_DIF[N]] 11

IF_P

Attenuator

ADCINP_DEMOD

IF_N

ADCINN_DEMOD

 

TUNER_SIF(for T2/C/S)

 

 

TU_CVBS(for

 

 

T2/C/S) IF_AGC

 

 

R33[PVR_TSSYNC]

AM27 [ADCINP_DEMOD]

R3[PVR_TSCLK]

AN27 [ADCINN_DEMOD]

R35[CI_TSDATA0]

[GPIO34-41] [GPIO18-25]

MTK5398_TS_CLK MTK5398_TS_VAL MTK5398_TS_SYNC

MT5398_TS_IN[0-7]

MT5398_TS_OUT[0-7]

47

47

CI_TS_CLK

CI_TS_VAL

CI_TS_SYNC

CI_TS_DATA[0-7]

CI_MDI[0-7]

TS_OUT_CLK TS_OUT_VAL TS_OUT_SYNC

TS_OUT[0-7]

TS_IN[0-7]

Copyright © 2013 LG Electronics. Inc. All rights reserved.

LGE Internal Use Only

Only for training and service purposes

 

Page 67
Image 67
LG Electronics 32LA62**-Z* service manual CI Slot, TDSQ G501D, Copyright 2013 LG Electronics. Inc. All rights reserved