THERMAL

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.

FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS

ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

DDR_A[6]
DDR_A[4]
DDR_A[7]
DDR_A[11]
DDR_A[10]
DDR_A[0]
DDR_A[8]
DDR_A[1]
DDR_A[5]
DDR_A[3]
DDR_A[12]
DDR_A[2]
DDR_A[9]
DDR_DQ[15]
DDR_DQ[14]
DDR_DQ[13]
DDR_DQ[12]
DDR_DQ[11]
DDR_DQ[10]
DDR_DQ[9]
DDR_DQ[8]
DDR_DQ[7]
DDR_DQ[6]
DDR_DQ[5]
DDR_DQ[4]
DDR_DQ[3]
DDR_DQ[2]
DDR_DQ[1]
DDR_DQ[0]
C_DDR_A[11]
C_DDR_A[7]
C_DDR_A[6]
C_DDR_A[5]
C_DDR_A[3]
C_DDR_DQ[3]
C_DDR_DQ[4]
C_DDR_DQ[5]
C_DDR_DQ[6]
C_DDR_DQ[7]
C_DDR_DQ[8]
C_DDR_DQ[11]
C_DDR_DQ[14]
C_DDR_A[0]
C_DDR_A[1]
C_DDR_A[2]
C_DDR_A[4]
C_DDR_A[9]
C_DDR_A[10]
C_DDR_A[12]
C_DDR_A[8]
C_DDR_DQ[5]
C_DDR_DQ[2]
C_DDR_DQ[0]
C_DDR_DQ[7]
C_DDR_DQ[13]
C_DDR_DQ[10]
C_DDR_DQ[8]
C_DDR_DQ[15]
C_DDR_DQ[14]
C_DDR_DQ[9]
C_DDR_DQ[11]
C_DDR_DQ[12]
C_DDR_DQ[3]
C_DDR_DQ[4]
C_DDR_DQ[1]
C_DDR_DQ[6]
C_DDR_DQ[0]
C_DDR_DQ[1]
C_DDR_DQ[2]
C_DDR_DQ[9]
C_DDR_DQ[10]
C_DDR_DQ[12]
C_DDR_DQ[13]
C_DDR_DQ[15]
DDR_DQ[5]
DDR_DQ[2]
DDR_DQ[0]
DDR_DQ[7]
DDR_DQ[13]
DDR_DQ[10]
DDR_DQ[8]
DDR_DQ[15]
DDR_DQ[14]
DDR_DQ[9]
DDR_DQ[11]
DDR_DQ[12]
DDR_DQ[3]
DDR_DQ[4]
DDR_DQ[1]
DDR_DQ[6]
TCLK1P
3D_GPIO_0
C1405
0.1uF
3D_ASIC
ZD1408
5.6B
3D_ASIC
JP1407
C1465
10uF
6.3V
R1485
3.3K

IC1401

W9725G6JB-25

3D_ASIC J2
VREF
J8
CLK
H2 VSSQ_2
B7
UDQS
N8
A4
P8
A8
L1
NC_4
L2
BA0
R8
NC_3
K7
RAS
F8 VSSQ_3
F3
LDM
P3
A9
M3
A1
N3
A5
K8
CLK
R3
NC_5
L3
BA1
J7
VSSDL
L7
CAS
F2 VSSQ_4
B3
UDM
M2
A10/AP
K2
CKE
R7
NC_6
M7
A2
N7
A6
M8
A0
J1
VDDL
K3
WE
E8
LDQS
P7
A11
K9
ODT
A2
NC_1
N2
A3
P2
A7
H8 VSSQ_1
F7
LDQS
A8
UDQS
R2
A12
L8
CS
E2
NC_2
E7 VSSQ_5
D8 VSSQ_6
D2 VSSQ_7
A7 VSSQ_8
B8 VSSQ_9
B2 VSSQ_10
P9 VSS_1
N1 VSS_2
J3 VSS_3
E3 VSS_4
A3 VSS_5
G9 VDDQ_1
G7 VDDQ_2
G3 VDDQ_3
G1 VDDQ_4
E9 VDDQ_5
C9 VDDQ_6
C7 VDDQ_7
C3 VDDQ_8
C1 VDDQ_9
A9 VDDQ_10
R1 VDD_1
M9 VDD_2
J9 VDD_3
E1 VDD_4
A1 VDD_5
B9 DQ15
B1 DQ14
D9 DQ13
D1 DQ12
D3 DQ11
D7 DQ10
C2 DQ9
C8 DQ8
F9 DQ7
F1 DQ6
H9 DQ5
H1 DQ4
H3 DQ3
H7 DQ2
G2 DQ1
G8 DQ0
R1569 0
3D_ASIC
LVDS_DATA_1_D-
TC2N
TB1N
R1477 100
C_DDR2_ODT
+3.3V_PLL
MOD_ROM_TX
TC3P
TC2N
R15620
ZD1405
5.6B
3D_ASIC
TMODE[3]
+3.3V_VDD
C1453
0.1uF
16V
R15490
TB1P
C1479
0.1uF
16V
TE2P
TCLK3P
+3.3V_3D_A
TD3P
C_DDR_DQS1P
R15200
TB1P
EMITTER_PULSE
R1566
4.7K
R1407
22
R1570 0
3D_ASIC
C1531
1000pF
READY
R1466 100
BOOT_SEL
C1435
2700pF
TCLK1N
TB1P
R1484
3.3K
READY
SPI_CK
R1436
22K
READY
3D_GPIO_1
TA3N
TA1P
+3.3V
C1444
0.1uF
16V
+3.3V_LTX
C1441
0.1uF
50V
TA2N
TE1P
C1533
1uF
READY
R15480
TC3N
LVDS_DATA_2_A-
DDR_VREF_LG8300
3D_ASIC
R15330
TC4N
C1455
10uF
10V
C1406
1000pF
3D_ASIC
3D_RF_RXD
C1451
10uF
10V
TE3P
LVDS_DATA_1_D+
DDR_BA[1]
TCLK3N
DDR_DQM1
C_DDR_DQS0M
C1450
0.1uF
16V
DDR_A[7]
DDR_DQS0M
C1436
0.1uF
16V
LVDS_DATA_2_D-
R1507
3.3K
READY
R15260
TC2P
/C_DDR_RAS
TA3N
TC1P
TC1N
C_DDR_A[4]
R15580
+3.3V_3D
R1504 0
READY
R1402
22
C1527
1000pF
READY
R141922
+3.3V_3D
DDR_BA[0]
C1515
0.1uF
16V
R1587
1K
3D_ASIC
R1539
0
3D_ASIC
TD3N
+1.8V
3D_ASIC
LVDS_CLK_1-
C_DDR_DQM0
TB2N
C1505
0.1uF
16V
DDR_A[12]
TB4P
C_DDR_A[5]
C_DDR_A[12-0]
R1575
100
3D_ASIC
SPI_DI
TB3P
/JTAG_TRST
SPI_DO
R1579
100
3D_ASIC
SCL_3.3V_MOD
TMODE[1]
JP1406
TD1P
C1482
0.1uF
16V
TD1N
SCL_3.3V_MOD
TE4N
LVDS_DATA_2_E+
+1.8V
TMODE[0]
+3.3V_3D
TA2N
R1567
2.7K
READY
TA1P
C_DDR_DQS0M
TD2N
TD3N
C1430
0.1uF
16V
R15270
C1415
10uF
6.3V
Q1400
KRC103S
E
B
C
JTAG_TMS
MOD_ROM_RX
R15640
X1400
25MHz
TD2N
R1413
22
TCLK2N
C_DDR_DQS0P
R15130
R1467 100
L1407
C1466
10uF
6.3V
C1419
10uF
16V
R1583
1K
3D_ASIC
C1437
0.1uF
16V
TA4P
TCLK3N
/DDR2_CLK
L1411
SDA_3.3V_MOD
+1.0V
R1482
3.3K
R1589
1K
3D_ASIC
P_SCL
R1478
1M1%
R1588
1K
3D_ASIC
R1509
22K
1%
TCLK4P
C1434
0.1uF
16V
LVDS_DATA_2_C-
R1586
1K
3D_ASIC
C1506
0.1uF
16V
TB2P
TE4P
R1573
2.7K
READY
C_DDR_BA[1]
LVDS_DATA_2_B+
LVDS_DATA_1_C+
LVDS_DATA_1_A+
C_DDR_A[6]
DDR_DQ[15-0]
LG8300_RESET
R15280
TE2N
TD1P
DDR_DQS0M
DDR_VREF_LG8300
R15590
TB3P
R1584
22
2D
DISP_EN
C1504
0.1uF
16V
C1529
1000pF
READY
LVDS_DATA_2_E-
TC1P
R1499
3.3K
3D_ASIC
C1439
0.1uF
16V
DDR_A[4]
C1472
0.1uF
16V
C_DDR_DQ[15-0]
TE2P
R1585
22
2D
C1511
0.1uF
16V
+3.3V_LRX
R1457
22
JP1402
DDR_DQS1P
+1.8V
TD4P
R1537
0
3D_ASIC
SPI_DI
C1402
470pF
50V
LVDS_CLK_2-
C_DDR_DQS1M
TMODE[3]
+1.0V
LVDS_DATA_1_E+
C1509
0.1uF
16V
TB2P
R15230
C1440
2200pF
LVDS_DATA_2_B-
R15300
SPI_CK
R1475 100
C1463
0.1uF
16V
C1495
0.1uF
16V
R15220
TCLK1P
LVDS_DATA_2_C-
R1571 0
3D_ASIC
LVDS_DATA_1_C+
TA2P
R1536
2.2K
3D_ASIC
ZD1407
5.6B
3D_ASIC
DDR_DQS1P
C1403
0.1uF
3D_ASIC
3D_RFMODULE_DD
TMODE[2]

LG8300

IC1400

VDD10_1
F6
VDD10_2
F13
VDD10_3
G6
VDD10_4
G7
VDD10_5
G8
VDD10_6
G9
VDD10_7
G10
VDD10_8
G11
VDD10_9
G12
VDD10_10
G13
VDD10_11
H6
VDD10_12
H13
VDD10_13
J6
VDD10_14
J13
VDD10_15
K6
VDD10_16
K13
VDD10_17
L6
VDD10_18
L7
VDD10_19
L8
VDD10_20
L9
VDD10_21
L10
VDD10_22
L11
VDD10_23
L12
VDD10_24
L13
VDD10_25
M6
VDD10_26
M13
LTX_VDD10_1
H5
LTX_VDD10_2
J5
LTX_VDD10_3
K5
LTX_VDD10_4
L5
LTX_VDD10_5
M5
VDD33_1
E5
VDD33_2
E6
VDD33_3
E7
VDD33_4
E8
VDD33_5
E9
VDD33_6
E10
VDD33_7
E11
VDD33_8
E12
VDD33_9
E13
VDD33_10
E14
VDD33_11
E15
VDD33_12
F15
VDD33_13
G15
LRX_AVDD33_1
L16
LRX_AVDD33_2
N16
LTX_AVDD33_1
E4
LTX_AVDD33_2
G4
LTX_AVDD33_3
L4
LTX_AVDD33_4
N4
LTX_AVDD33_5
J4
DDR_VREF0
T4
DDR_VREF1
R11
DDR_VREF2
V17
DDR_VDDQ_1
N7
DDR_VDDQ_2
N8
DDR_VDDQ_3
N9
DDR_VDDQ_4
N10
DDR_VDDQ_5
N11
DDR_VDDQ_6
N12
DDR_VDDQ_7
N13
DDR_VDDQ_8
N14
DDR_VDDQ_9
P6
DDR_VDDQ_10
P7
DDR_VDDQ_11
P8
DDR_VDDQ_12
P9
DDR_VDDQ_13
P10
DDR_VDDQ_14
P12
DDR_VDDQ_15
P13
DDR_VDDQ_16
P14
DDR_VDDQ_17
P15
GND_1 F5
GND_2 F7
GND_3 F8
GND_4 F9
GND_5 F10
GND_6 F11
GND_7 F12
GND_8 F14
GND_9 G5
GND_10 G14
GND_11 G16
GND_12 H7
GND_13 H8
GND_14 H9
GND_15 H10
GND_16 H11
GND_17 H12
GND_18 H14
GND_19 H15
GND_20 H16
GND_21 J7
GND_22 J8
GND_23 J9
GND_24 J10
GND_25 J11
GND_26 J12
GND_27 J14
GND_28 J15
GND_29 J16
GND_30 K7
GND_31 K8
GND_32 K9
GND_33 K10
GND_34 K11
GND_35 K12
GND_36 K14
GND_37 K15
GND_38 K16
GND_39 L14
GND_40 L15
GND_41 M7
GND_42 M8
GND_43 M9
GND_44 M10
GND_45 M11
GND_46 M12
GND_47 M14
GND_48 M15
GND_49 N5
GND_50 N6
GND_51 N15
GND_52 P5
GND_53 P11
GND_54 R4
GND_55 R14
LRX_AVSS33_1 M16
LRX_AVSS33_2 P16
LTX_AVSS33_1 F4
LTX_AVSS33_2 H4
LTX_AVSS33_3 K4
LTX_AVSS33_4 M4
LTX_AVSS33_5 P4
DDRPLL_AVSS33 C17
SYSPLL_AVSS33 D17
ADPLL_AVSS33 E16
SSPLL_AVSS33 F16
DDRPLL_AVDD33 C18
SYSPLL_AVDD33 D18
SSPLL_AVDD33 E17
ADPLL_AVDD33 E18
GND_0 A2
LVDS_DATA_2_E-
TA4P
+1.8V
ZD1403
5.6B
3D_ASIC
R1415
22
C1521
0.1uF
16V
C1499
0.1uF
16V
TB1N
TB2P
EMITTER_PULSE
3D_L/R_SYNC
C1460
22uF
16V
C_DDR2_CKE
JP1410
R1479
3.3K
+3.3V_3D
TD4N
R1454
22
C1532
1000pF
READY
JTAG_TDO
R15180
JTAG_TCLK
+3.3V
AR1412
22
1/16W
TA1N
TCLK2P
TCLK2N
C1530
1000pF
READY
R1581
2.7K
READY
JTAG_TDI
+3.3V_LTX
C_DDR_DQM0
3D_RF_RESET
P1400
YFDW254-14S
READY
14 VIO
9
TCK
4GND
13
DINT
8GND
3
TDI
12 NC
7
TMS
2GND
11
nRST
6GND
1
nTRST
10 GND
5
TDO
R1429
4.7K
1%
3D_ASIC
TCLK1P
LVDS_CLK_1-
TE1P
+1.8V
R1421
0
READY
AR1400
22
1/16W
R1535
2.2K
3D_ASIC
R15450
R1434
1K
READY
TE3N
C_DDR_A[11]
LVDS_CLK_2+
SPI_CSZ
C1493
0.1uF
16V
C_DDR_BA[1]
C1424
0.1uF
16V
3D_L/R_SYNC
TA2N
C_DDR_A[8]
R15470
AR1411
22
1/16W
L1400
BLM18PG121SN1D
LVDS_DATA_2_D+
TB4N
R1474 100
TE1N
TCLK2N
C_DDR_DQM1
FLASH_WP
TMODE[1]
C1416
0.1uF
16V
/C_DDR2_CLK
JP1408
R1480
3.3K
READY
R141822
C1445
0.1uF
16V
TC1N
R1404
22
ZD1404
5.6B
3D_ASIC
TC2P
LG8300_RESET
MOD_ROM_TX
C1404
1000pF
3D_ASIC
+3.3V_3D

+1.8V_ON

R15250
R1488
3.3K
READY
C1442
0.1uF
16V
R1591
2.7K
READY
/DDR_CS
TB2N
3D_L/R_SYNC_FHD
TE4P
+3.3V
C1478
0.1uF
16V
+3.3V_PLL
R1472 100
TD2N
R1501
3.3K
3D_ASIC
DDR_BA[1]
+3.3V_LRX
C1467
10uF
6.3V
TCLK1N
C1491
0.1uF
16V
TD2P
R1410
22
PC_SER_CLK
R14200
LVDS_DATA_1_E+
C1481
0.1uF
16V
LVDS_DATA_2_E+
+5V
/DDR2_CLK
DDR_DQS1M
TE1P
DISP_EN
R15530
R1417
22
/DDR_CS
R1468 100
LVDS_CLK_2-
C1490
0.1uF
16V
DDR_DQS0P
C1528
1000pF
READY
IC1406
AZ1085S-3.3TR/E1
1ADJ/GND
2OUTPUT
3
INPUT
R1574 0
READY
TC2P
C1535
4.7uF
10V
READY
TD1N
R15210
R15320
TD4N
R15610
C1516
0.1uF
16V
TB4P
R1481
3.3K
P1403
12507WS-04L
READY
1
2
3
4
5
R15460 TCLK2N
R1495
3.3K
3D_ASIC
3D_L/R_SYNC_FHD
JTAG_TMS
L1409
R1435
4.7K
1%
3D_ASIC
R1503 10K
TD3P
R15310
DDR_A[3]
C1452
0.1uF
16V
LVDS_DATA_1_C-
JP1412
R141622
TCLK2P
LVDS_DATA_1_A-
C1459
0.1uF
16V
R1401
22
LVDS_DATA_2_D- R15290
DDR_BA[0]
C1494
0.1uF
16V
R15190
R1455
22
DDR_A[6]
C1423
0.1uF
16V
TCLK2P
JP1405
C1431
0.1uF
16V
C1475
0.1uF
16V
TE2N
R15120
+3.3V_VDD
+3.3V_3D
R15240
TC2P
DDR2_CKE
R1473 100
TD1P
JTAG_TDI
C1514
0.1uF
16V
+1.0V
R15650
R1424
0
READY
TA1N
DDR_DQS1M
AR1403
22
1/16W
C1401
100pF
50V
TCLK4N
C1500
10uF
6.3V
DDR_DQM0
TCLK2P
TE2N
R1506
330K
R15110
DDR2_CLK
BOOT_SEL
R1409
22
LVDS_DATA_2_A+
+5V
3D_RFMODULE_DC
JP1403
TB2N
JTAG_TDO
R1576
100
3D_ASIC
TC4P
AR1413
22
1/16W
L1412
3D_ASIC
TE3N
TC1P
DDR_DQ[15-0]
C1480
0.1uF
16V
DDR_A[11]
TE1N
+1.0V_LTX
R1491
0
READY
FLASH_WP
R15520
C_DDR2_CKE
C1507
0.1uF
16V
C_DDR_BA[0]
C1458
0.1uF
16V
C1484
0.1uF
16V
R1464
0
TB3N
C1517
0.1uF
16V
R1492
10K
READY
/DDR_WE
DDR_DQM0
C_DDR_DQM1
DDR_A[5]
DDR_VREF_DDR
3D_ASIC
R1486
3.3K

IC1400

LG8300

3D_ASIC
TE4P
B2
TE4N
B1
TD4P
B3
TD4N
C3
TCLK4P
C1
TCLK4N
C2
TC4P
D2
TC4N
D1
TB4P
D3
TB4N
E3
TA4P
E1
TA4N
E2
TE3P
F2
TE3N
F1
TD3P
F3
TD3N
G3
TCLK3P
G1
TCLK3N
G2
TC3P
H2
TC3N
H1
TB3P
H3
TB3N
J3
TA3P
J1
TA3N
J2
TE2P
K2
TE2N
K1
TD2P
K3
TD2N
L3
TCLK2P
L1
TCLK2N
L2
TC2P
M2
TC2N
M1
TB2P
M3
TB2N
N3
TA2P
N1
TA2N
N2
TE1P
P2
TE1N
P1
TD1P
P3
TD1N
R3
TCLK1P
R1
TCLK1N
R2
TC1P
T2
TC1N
T1
TB1P
T3
TB1N
U3
TA1P
U1
TA1N
U2
DDR_ADDR[0]
U5
DDR_ADDR[1]
V8
DDR_ADDR[2]
V5
DDR_ADDR[3]
U8
DDR_ADDR[4]
R6
DDR_ADDR[5]
T8
DDR_ADDR[6]
T6
DDR_ADDR[7]
R8
DDR_ADDR[8]
R7
DDR_ADDR[9]
U7
DDR_ADDR[10]
R9
DDR_ADDR[11]
T7
DDR_ADDR[12]
V7
DDR_BA[0]
U9
DDR_BA[1]
T9
DDR_CK
V6
DDR_CK_N
U6
DDR_CKE
V9
DDR_CS_N
R5
DDR_ODT
U4
DDR_RAS_N
V4
DDR_CAS_N
T5
DDR_WE_N
R10
DDR_DQS[0]
V14
DDR_DQS[1]
V12
DDR_DQS_N[0]
U14
DDR_DQS_N[1]
U12
DDR_DM[0]
R15
DDR_DM[1]
T12
DDR_DQ[0]
V15
DDR_DQ[1]
T15
DDR_DQ[2]
U16
DDR_DQ[3]
T16
DDR_DQ[4]
R16
DDR_DQ[5]
V16
DDR_DQ[6]
T14
DDR_DQ[7]
U15
DDR_DQ[8]
T13
DDR_DQ[9]
V11
DDR_DQ[10]
U13
DDR_DQ[11]
U11
DDR_DQ[12]
T11
DDR_DQ[13]
V13
DDR_DQ[14]
R12
DDR_DQ[15]
R13
DDR_TAOUT
U10
DDR_TDOUT[0]
T10
DDR_TDOUT[1]
V10
RA1N U18
RA1P U17
RB1N T18
RB1P T17
RC1N R18
RC1P R17
RCLK1N P18
RCLK1P P17
RD1N N18
RD1P N17
RE1N M18
RE1P M17
RA2N L18
RA2P L17
RB2N K18
RB2P K17
RC2N J18
RC2P J17
RCLK2N H18
RCLK2P H17
RD2N G18
RD2P G17
RE2N F18
RE2P F17
CLK_XIN A17
CLK_XOUT B18
PO_RST_N B17
LR_SYNC V2
EMITTER_PULSE V3
UART_TXD A16
UART_RXD B16
SPI_CS C16
SPI_SCLK D16
SPI_DO A15
SPI_DI B15
SCL C15
SDA D15
SCL_M A14
SDA_M B14
GPIO[0] C14
GPIO[1] D14
GPIO[2] A13
GPIO[3] B13
GPIO[4] C13
GPIO[5] D13
GPIO[6] A12
GPIO[7] B12
GPIO[8] C12
GPIO[9] D12
GPIO[10] A11
GPIO[11] B11
GPIO[12] C11
GPIO[13] D11
GPIO[14] A10
GPIO[15] B10
GPIO[16] C10
GPIO[17] D10
GPIO[18] A9
GPIO[19] B9
GPIO[20] C9
GPIO[21] D9
GPIO[22] A8
GPIO[23] B8
GPIO[24] C8
GPIO[25] D8
GPIO[26] A7
GPIO[27] B7
GPIO[28] C7
GPIO[29] D7
GPIO[30] A6
GPIO[31] B6
TDI C6
TMS D6
TRST A5
TDO B5
TCK C5
TEST_SE D5
TMODE[0] A4
TMODE[1] B4
TMODE[2] C4
TMODE[3] D4
BOOT_SEL A3
R1400
100
DDR_DQM1
TA3P
LVDS_CLK_1+
C_DDR_A[7]
LVDS_DATA_1_B+
C1526
1000pF
READY
C1501
0.1uF
16V
/DDR_RAS
TA3P
JP1401
/DDR_RAS
R1510
5.1K
1%
R1471 100
R15510
C1508
0.1uF
16V
R1405
22
C_DDR_DQ[15-0]
UART_TXD_3D
R1412
22
C1470
10uF
6.3V
R1456
22
LVDS_DATA_1_D+
P_SDA
R15440
TC4N
LVDS_DATA_2_B+
TD1N
R1469 100
R15540
ZD1402
5.6B
3D_ASIC
DDR_A[8]
DDR2_ODT
MOD_ROM_RX
TA1P
R1414
22
C1513
0.1uF
16V
R15630
/C_DDR_RAS
R15550
R1427
4.7K
1%
3D_ASIC
+3.3V_LTX
R1494
3.3K
READY
DDR_VREF_DDR
L1402
3.6uH
DDR2_CLK
C1413
27pF
50V
SPI_DO
/DDR_WE
DDR_VREF_LG8300
R1590
2.7K
READY
R15430
C_DDR2_CLK
FLASH_WP
R1498
1K
3D_ASIC
C_DDR_A[12]
+3.3V_3D_A
C1485
0.1uF
16V
C1476
0.1uF
16V
/C_DDR2_CLK
C1432
0.1uF
16V
C1429
0.1uF
16V
READY
C_DDR_A[2]
C_DDR2_CLK
/DDR_CAS
+1.8V

P1401

TF05-51S

HD

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
LVDS_DATA_1_B-
C1510
0.1uF
16V
SDA_3.3V_MOD
+3.3V_VDD
R15420
SDA_3.3V_MOD
TE3P
JP1411
R1578 0
3D_ASIC
C1519
0.1uF
16V
C1498
0.1uF
16V
TC3N
C1414
27pF
50V
C1474
0.1uF
16V
R1572 0
3D_ASIC
LVDS_DATA_1_E-
JP1413
+5V
TA2P
SPI_CSZ
3D_GPIO_2
C1464
10uF
6.3V
P1402
104060-8017
FHD
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
C1473
0.1uF
16V
TMODE[2]
C1461
22uF
16V
TE2P
+1.0V
P_SDA
C1456
0.1uF
16V
TD1P
TD2P
R1489
10K
L1404
3D_ASIC
C1462
0.1uF
16V
LVDS_DATA_2_A-
TE2P
C_DDR_DQS1P
DDR_A[9]
ZD1406
5.6B
3D_ASIC
R1433 0
READY
TMODE[0]
C_DDR_A[10]
PC_SER_DATA
JP1409
C1483
0.1uF
16V
/C_DDR_CAS
R1426
4.7K
1%
3D_ASIC
R15500
+1.8V
3D_ASIC
C1503
0.1uF
16V
C_DDR_DQS1M
C1512
0.1uF
16V
SCL_3.3V_MOD
P1404
12507WS-12L
1
2
3
4
5
6
7
8
9
10
11
12
13
LVDS_DATA_1_E-
PC_SER_DATA
R1568
0
1/10W
5%
/C_DDR_CAS
C_DDR_A[3]
TC2N
/JTAG_TRST
2N7002(F)
Q1402
3D_ASIC
G
D
S
LVDS_CLK_2+
TCLK1N
JP1414
/DDR_CAS
TB1N
TC4P
R1500
3.3K
3D_ASIC
C1468
10uF
6.3V
R14250
TD4P
TE1N
TA4N
LVDS_DATA_1_B-
AR1410
22
1/16W
R1437
560
READY
R1453
22
TC1N
C_DDR_A[0]
TCLK4N
0.1uF
C1454
16V
+1.8V
C1457
22uF
25V
+3.3V_3D
C_DDR2_ODT
IC1407
KIA1117ST18
OUT
INADJ/GND
TD2N
LVDS_CLK_1+
R15600
C1427
0.1uF
16V
R15170
LVDS_DATA_2_A+
TCLK3P
TB2P
R1408
22
C1428
0.1uF
16V
READY
TD1N
LVDS_DATA_2_D+
R1541
1
3D_ASIC
L1405
2D
C1477
0.1uF
16V
ZD1401
5.6B
3D_ASIC
JTAG_TCLK
TB3N
R1430
10K
READY
C1525
1000pF
READY
IC1403
SI3865BDV
READY
3D2_2
2D2_1
1R2
4
S2
5
ON/OFF
6
R1/C1
R1432 0 READY
TB4N
LVDS_DATA_1_D-
3D_RF_TXD
/C_DDR_WE C1487
0.1uF
16V
C_DDR_A[1]
/C_DDR_CS
LVDS_DATA_1_C-
0.1uF
C1420
C1469
10uF
6.3V
L1406
120-ohm
2A
READY
L1403
PC_SER_CLK
R15570
IC1402
W25X20BVSNIG
3
WP
2
DO
4
GND
1
CS
5DIO
6CLK
7HOLD
8VCC
R1423
10K
READY
JP1404
TD2P
C1518
0.1uF
16V
R1403
22
TCLK4P
R1411
22
C1400
0.1uF
16V
TA1N
R1470 100
+3.3V_3D
R15560
TB2N
TA2P
C1471
0.1uF
16V
LVDS_DATA_2_C+
+1.0V_LTX
TA1N
2N7002(F)
Q1401
3D_ASIC
G
D
S
/C_DDR_WE
TCLK1N
+3.3V
R1538
4.7K
P_SCL
R1502
0
C1534
22uF
16V
READY 3225
L1410
R15160
C1489
0.1uF
16V
DDR_A[0]
C_DDR_A[9]
R1580
2.7K
READY
TA1P
R1476 100
+3.3V_PLL
L1408
TCLK1P
TC1N
DDR_DQS0P
TE4N
TE2N
AR1404
22
1/16W
R1452
22
R1577 0
3D_ASIC
R1431
1
3D_ASIC
TC1P
+1.0V_LTX
C_DDR_DQS0P
C1497
10uF
6.3V
R1487
3.3K
READY
AR1402
22
1/16W
+3.3V_3D
TD2P
3D_ASIC
TB1P
TA4N
3D_L/R_SYNC
+3.3V_3D
C1488
0.1uF
16V
LVDS_DATA_1_A+
C1492
0.1uF
16V
R1428
10K
READY
TA2N
TC3P
R15400
READY
AR1401
22
1/16W
R1406
22
DDR_A[2]
LVDS_DATA_1_A-
/C_DDR_CS
DDR2_ODT
DDR_A[10]
LVDS_DATA_1_B+
DDR2_CKE
R15340
DDR_A[12-0]
+3.3V_LRX
TA2P
SW1400
JTP-1127WEM
READY
1 2
43
C1502
10uF
6.3V
C1449
22uF
10V
READY
C1496
0.1uF
16V
3D_ASIC
R15150
UART_RXD_3D
C1448
100pF
50V
3D_ASIC
TB1N
TE1N
DDR_A[1]
TE1P
R1483
3.3K
READY
R15140
TC2N
IC1404
TPS54319TRE
3D_ASIC
1
VIN_1
3
GND_1
7
COMP
9SS/TR
10 PH_1
11 PH_2
12 PH_3
13 BOOT
14 PWRGD
15 EN
16 VIN_3
5
AGND
8
RT/CLK
6
VSENSE
4
GND_2
2
VIN_2 17
EP[GND]
C1520
0.1uF
16V
C1486
0.1uF
16V
LVDS_DATA_2_B-
LVDS_DATA_2_C+
C_DDR_BA[0]

3DF

2010.10.21EAX63425902(5)

3.3V TO 1.8V

5.0V TO 3.3V

EJTAG

5V TO 1.0V

Switching freq: 600K

R2

Vout=0.8*(1+R1/R2)

R1

3A

2D BYPASS

RF EMITTER (STRAIGHT)

IR EMITTER (STRAIGHT)

14

14

2MBIT(256K X 8Bit) serial Flash

LG8300_RESET

L/R_DETECT

LGE8300 DDR2 256MBIT

L/R_DETECT
$0.081

Close to LG8300 Close to DDR2(IC1401)

+3.3V3D TO +3.3V_3D_A

Copyright © 2011 LG Electronics Inc. All rights reserved.
Only for training and service purposes
LGE Internal Use Only