6
www.st.com/m icropsd
•Built-in Address Decoding PLD
– Map any µPSD memory sector to any address
– Easily convert existing 8051 designs into µPSD
– Total memory mapping flexibility for new designs
•Memory Paging is Easy using Decode PLD
– Break traditional 8051 64K Byte address lim it imposed by only 16 address l ines
– 8-bit page register is built into Decode P LD … it’s like having 8 more address lines
– Paging (or banking) is directly supported by mos t 8051 C compilers
Excellent Memory Management
Excellent Memory Management
64K
FFFF Page 0
Page 0
32K Main
32K Main
Flash
Flash
Common to All Pages
Map here: SRAM, 2nd Flash, I/O, etc
0000
Page 1
Page 1
32K Main
32K Main
Flash
Flash
Page 2
Page 2
32K Main
32K Main
Flash
Flash
Page 3
Page 3
32K Main
32K Main
Flash
Flash
MAIN FLASH
MAIN FLASH
MAIN FLASH 8
Sectors
MAIN FLASH
MAIN FLASH
MAIN FLASH
MAIN FLASH
MAIN FLASH
MAIN FLASH 8
Sectors
2nd FLASH
2
2nd
nd FLASH
FLASH 4
Sectors
2nd FLASH
2
2nd
nd FLASH
FLASH
2nd FLASH
2
2nd
nd FLASH
FLASH 4
Sectors
SRAM
SRAM
SRAM 1
Sector
DECODE
PLD
DECODE
DECODE
PLD
PLD
Sector
Selects
Page
Register
8032
MCU
8032
8032
MCU
MCU Address
Sector
Selects
Page 7
Page 7
32K Main
32K Main
Flash
Flash