Excellent Memory Managementment

Built-in Address Decoding PLD

Sector

Selects

1

– Map any µPSD memory sector to any address

Page

SRAMSRAMSRAM

Sector

Easily convert existing 8051 designs into µPSD

Total memory mapping flexibility for new designs

8032

Address

MCU

 

 

 

 

Memory Paging is Easy using Decode PLD

Register

DECODE MAINMAINMAIN FLASHFLASHFLASH PLD

22ndnd FLASHFLASH

2nd FLASH

Sector

Selects

8

Sectors

4

Sectors

Break traditional 8051 64K Byte address limit imposed by only 16 address lines

8-bit page register is built into Decode PLD … it’s like having 8 more address lines

Paging (or banking) is directly supported by most 8051 C compilers

FFFF

 

 

 

 

 

 

Page 0

Page 1

Page 2

Page 3

 

Page 7

 

 

 

 

 

 

 

 

Page 7

 

 

32K Main

32K Main

32K Main

32K Main

 

32K Main

 

 

Flash

 

 

32K Main

 

 

Flash

Flash

Flash

 

Flash

64K

 

 

 

Flash

 

 

 

 

 

 

Common to All Pages

Map here: SRAM, 2nd Flash, I/O, etc

0000

www.st.com/micropsd

6

Page 6
Image 6
Manley Labs switch/hub manual Excellent Memory Managementment, Built-in Address Decoding PLD, Common to All Pages