PSD Family Growth

CPU

Turbo 4-cycle 8032 Core

• 10+ MIPs at 40MHz

SRAM

Up to 32K byte SRAM

Size supports: C/C++, fast math, buffer for large fast communication packets

• Up from 3 MIPs, 12-cycle core

• Enhanced timer block with six

16-bit capture/compare,

timer/counters, or PWM units

PSD

FLASHFLASH

Up to 512K byte Main Flash

JTAG Debug and Emulation

• Eliminate external In-Circuit

Emulation Hardware

ANALOG

10-bit ADC channels

• Greater accuracy

 

• Size supports: C/C++, RTOS, GUI,

 

data recording, look-up tables, load

 

FPGAs, multi-national products

 

PLD

 

PLD

INTERFACEI

Up to 32 MacroCell PLD

USB 1.1 Full-Speed

• 12 nsec propagation

• Eliminate external CPLDs

• 12 Mbits/sec, 5V and 3V

• Build custom peripherals

• FIFOs for rapid transfer of bulk data

• Build complex glue logic

 

5V tolerant general I/O

www.st.com/micropsd

• 3V system connects to 5V peripherals

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Manley Labs switch/hub manual ∝ PSD Family Growth, Sram