To create a basic design with the MAX6877, such as the one in Figure 1, follow these steps:
1.Select the input voltage thresholds for IN1, IN2, and IN3. The input voltages must exceed these thresholds for
2.Select the
3.Set the voltage slew rate. (This is the rate at which the voltages at the outputs OUT1, OUT2, OUT3 ramp up and down.) Select capacitor CSLEW by using the following formula:
where CSLEW is in farads, and SR is in V/s. CSLEW must be in the range of 100pF < CSLEW < 1nF.
4.In
where CDELAY is in farads, and tDELAY is in seconds. tDELAY is also the delay time from when all thresholds are exceeded to the start of sequencing or tracking. CDELAY can be safely left out of the circuit, in which case tDELAY becomes the default 200µs.
5.Pick the MOSFETs for each channel. Ensure that the MAX6877
Multiple MAX6877 parts can be connected together by connecting the
Application Note 3918:
More Information
For technical support:
For samples:
Other questions and comments:
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