available. This will occur if the GO/HALT line is in the Halt (low) mode or the 14PU is in a "Wait" state as the result of some instruction, such as the WAI instruction.
10.THREE-STATE CONTROL: (TSC)
This input causes all of the address lines and the Read/Write line to go into the off or high impedance state. The Valid Memory address and Bus Available signals will be forced low. The data bus is not affected by TSC and has its own enable (Data Bus Enable). In DMA applications, the
11.ADDRESS BUS (AO/A15):
Sixteen pins are used for the address bus. The outputs are
When the output is turned off, it is essentially an open circuit. This permits the MPU to be used in DMA applications.
12.DATA BUS (DO/D7):
Eight pins are used for the data bus. It is