PCI Express Board User’s ManualTechnical Reference

Configuration

 

Data Bits

5, 6, 7, 8

Stop Bits

1, 1.5, 2

I/O address/IRQ

BISO assigned

Parity

None, Even, Odd, Space, Mark

Flow Control

RTS/CTS, XON/XOFF

Power and Environment

 

Power Requirement

430 mA (3.3V)

Operating Temperature

0 to 55°C (32 to 132°F)

Operating Humidity

5 to 95% RH

Storage Temperature

-20 to 85°C (-4 to 185°F)

Surge Protection

Embedded 15 KV ESD Surge Protection

Regulatory Approvals

EN55022 Class B, EN55024, EN6100-3-2, EN61000-3-3,

 

FCC Part 15 Class B

Warranty

5 years

PCI Express

The PCI-SIG has defined a new I/O technology, PCI Express, which over time is expected to replace the current I/O bus technologies PCI, PCI-X, and AGP.

One advantage of the serial architecture of PCI Express is the lower pin count for all PCI Express devices compared to PCI and PCI-X. For example, a ⋅ 1 Link uses only 8 traces—significantly less than a PCI bus, which uses a minimum of 74 traces. This more pin-efficient design not only reduces manufacturing costs, it also greatly reduces the number of traces that are required on the PCB, thus simplifying the routing of traces. Additionally, this architecture reduces the electrical issues that limit the signaling rate of PCI and PCI-X.

The advantages of PCI Express compared to PCI, PCI-X, AGP, and CardBus include the following:

ySupport for multiple marker segments and emerging applications

yCost effective implementation and manufacture

yCompatibility with the PCI software model

ySuperior performance and scalability

ySupport for new modules

MOXA UART

The MOXA UART is an intelligent asynchronous controller that supports one full duplex channel that simultaneously transfers data at a transmission speed of 921.6 Kbps. To increase overall data throughput, special features such as on-chip FIFO and on-chip hardware flow control are used to reduce the number of interrupts to the onboard CPU, helping to prevent data loss.

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