National Instruments GPIB-COM

Section Five Programming the GPIB-COM

Bit Mnemonic Description

3r/w PEN Parity Enable Bit

If this bit is set, the INS8250 will generate and check parity

according to the values of the STP and EVEN bits (bits 4 and

5). If this bit is clear, the INS8250 will not generate or check

parity bits.

This bit is ignored by the GPIB-COM.

2r/w STB Stop Bit Control Bit

This bit controls the number of stop bits sent and verified by the

INS8250. If this bit is set, two stop bits will be used. If this bit

is clear, one stop bit will be used.

This bit is ignored by the GPIB-COM.

1-0r/w WL[1-0] Word Length Select Bits

These two bits set the length of the words sent or received

according to Table 5-3.

Table 5-3. Word Length Select Bits

Bit 1 Bit 0 Word Length

0 0 5 bits

0 1 6 bits

1 0 7 bits

1 1 8 bits

These bits have no meaning on the GPIB and are ignored by the

GPIB-COM circuitry.

Contents

Main Page Page FCC/DOC Radio Frequency Interference Compliance Preface Introduction to the GPIB-COM Organization of This Manual Related Documents Abbreviations Used in This Manual Contents Page Figures Tables Section One Introduction GPIB-COM Characteristics What Your Kit Should Contain Optional Equipment Page Page Switch and Jumper Settings Base I/O Address and Interrupt Selection Talk/Listen Modes Talk/Listen Address and Special Function Selection Page Installation Special Considerations When Using the GPIB-COM filename Page Function Description Section Three GPIB-COM User Manual 3-2 National Instruments Corporation Figure 3-1 shows a block diagram of the GPIB-COM. GPIB Figure 3-1. Block Diagram of GPIB-COM GPIB-COM Components Page Section Four Running Diagnostic Tests The GPIB-COM Test Commands -1 printer test -2 plotter test -c change COM configuration -q quit Section Five Programming the GPIB-COM The GPIB-COM Registers Transmitter Holding Register Receive Buffer Register Divisor Latch Least Significant Byte (LSB) Register Divisor Latch Most Significant Byte (MSB) Register Interrupt Enable Register Page Interrupt Identification Register Line Control Register Page Modem Control Register Page Line Status Register Page Modem Status Register Page Programming the Serial Adapter Polling Method Interrupt-Driven Method The GPIB-COM Controller Function Appendix A Specifications Page Multiline Interface Messages Hex Oct Dec ASCII Msg Hex Oct Dec ASCII Msg Message Definitions Multiline Interface Messages Hex Oct Dec ASCII Msg Hex Oct Dec ASCII Msg Appendix C Operation of the GPIB History of the GPIB Types of Messages Talkers, Listeners, and Controllers System Controller and Active Controller GPIB Signals Appendix C Operation of the GPIB National Instruments Corporation C-3 GPIB-COM User Manual Figure C-1 shows the arrangement of these signals on the GPIB cable connector. Data Lines Handshake Lines NRFD (not ready for data) NDAC (not data accepted) Page Page Page Configuration Restrictions User Comment Form