National Instruments NI PCI-8254R - page 2

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Contents

Main Page Important Information Warranty Copyright Trademarks Patents Compliance Compliance with FCC/Canada Radio Frequency Interference Regulations Determining FCC Class FCC/DOC Warnings Class A Conventions Contents Chapter 1 Introduction Chapter 2 Digital I/O Page Introduction Software Overview Vision Builder for Automated Inspection Vision Development Module IEEE 1394 and NI 8254R Functional Overview Start Conditions Acquisition Window Control Digital I/O RIO and LabVIEW FPGA TTL Inputs and Outputs Isolated Inputs and Outputs I/O for Normal Operation Trigger Inputs Timed Pulse Output Initiating a Timed Pulse Pulse Modes Pulse Delay Pulse Width Trigger Polarity Trigger Change Detectors Quadrature Encoder Product Selection Port Using ISO Input 5 as a Latch General-Purpose I/O General-Purpose Inputs General-Purpose Outputs I/O for Fault Conditions Shutdown Watchdog Timer Considerations When Connecting the Digital I/O Wiring an Isolated Input to a Sourcing Output Device Wiring an Isolated Output to an External Load Protecting Inductive Loads Transmission Line Effects Signal Connections The following diagram shows the connectors on the NI 8254R device. Connectors V C 2-Position Isolated Outputs Power Connector IEEE 1394a Connector General-Purpose Digital I/O Page Page Page Page Cabling IEEE 1394 Camera Cables I/O Terminal Block V C NI Vision I/O Terminal Block and Prototyping Accessory Power Requirements Isolated Outputs Power Connector Page A Technical Support and Professional Services Page Glossary F H I N P Q R T Page Index N P Q R S T W