Index
SCXI-1163 User Manual Index-4 © National Instruments Corporation
parts locator diagram
jumper configuration, 2-2
SCXI-1326 terminal block, 2-13
PC-LPM-16 cable assembly. See
SCXI-1342 PC-LPM-16
cable assembly.
physical specifications, A-1
pin assignments
front connector, 2-9, D-2
rear signal connector, 2-15, B-2
SCXI-1343 rear screw terminal adapter,
E-17 to E-18
SCXIbus connector, 3-2, C-2
pin equivalences
rear signal connector to data acquisition
boards, 2-18
SCXI-1163, DIO-96, AT-MIO-16D, and
AT-MIO-64F-5 board
equivalences, E-8 to E-9
SCXI-1163, MIO-16, and DIO-24 board
pinout equivalences, E-2
SCXIbus connector to rear signal
connector, 3-4
SCXIbus to rear signal connector to data
acquisition board, 5-2
pin translations
SCXI-1341 Lab-NB, Lab-PC, or
Lab-PC+ cable assembly, E-4
SCXI-1342 PC-LPM-16 cable
assembly, E-6
SCXI-1344 Lab-LC cable assembly, E-4
SCXI-1348 DIO-32F cable
assembly, E-11
port assignments, 3-7
power-up state, 5-3
Primary Mode Status Register
description, 4-5
register circuitry, 3-6
programming
examples, 5-4 to 5-5
initialization, 5-3
notation, 5-1
register selection and write procedure,
5-2 to 5-3
register writes, 5-1 to 5-3
SCXIbus to rear signal connector to
data acquisition board pin
equivalents, 5-2
R
rear signal connector, 2-14 to 2-18
digital I/O signal connections,
2-17 to 2-18
overview, 2-14
pin assignments, 2-15, B-2
pin equivalences
data acquisition board, 2-18
SCXIbus connector, 3-4
serial I/O signal connections,
2-17 to 2-18
signal descriptions
parallel configuration, 2-16 to 2-17,
B-3 to B-4
serial configuration, 2-16, B-3
register circuitry
Data Register, 3-6
diagram, 3-5
Module ID Register, 3-6
Output Mode Register, 3-6
Primary Mode Status Register, 3-6
theory of operation, 3-5 to 3-6
writing to Data Register, 3-6
registers
Address Handler
description, 4-2
register addresses, 4-2
register circuitry, 3-6
selecting Data Register, 3-6
timing diagram, 2-21
writing to Address Handler,
2-21, 5-3
Data Register
description, 4-4
programming, 5-1 to 5-3
register circuitry, 3-6
register writes, 5-1 to 5-3
write timing diagram, 2-22
writing to Data Register, 2-22, 3-6
description format, 4-1
Module ID Register
description, 4-3
jumper connections, 2-6
reading from Module ID
Register, 2-23
register circuitry, 3-6
timing diagram, 2-23
Output Mode Status Register
description, 4-5
register circuitry, 3-6
Parking Register, 4-6
Primary Mode Status Register
description, 4-5
register circuitry, 3-6
programming
examples, 5-4 to 5-5
initialization, 5-3
notation, 5-1