NXP Semiconductors SA58670A 6. Pinning information

SA58670A_2 © NXP B.V. 2008. All rights reserved.

Product data sheet Rev. 02 — 23 October 2008 3 of 24

NXP Semiconductors SA58670A

2.1 W/channel stereo class-D audio ampliﬁer

6. Pinning information

6.1 Pinning

6.2 Pin description

(1) Exposed Die Attach Paddle (DAP).

Fig 2. Pin conﬁguration for HVQFN20

002aad664

SA58670ABS

Transparent top view

OUTRN

PGND

OUTLN

PGND

PVDD PVDD

OUTLP OUTRP

G1 G0

n.c.

SDL

SDR

AVDD

n.c.

INLP

INLN

AGND

INRN

INRP

511

412

313

214

115

6

7

8

9

10

20

19

18

17

16

terminal 1

index area

DAP(1)

Table 2. Pin description

Symbol Pin Description

G1 1 gain select input 1

OUTLP 2 left channel positive output

PVDD 3 power supply voltage (level same as AVDD)

PGND 4 power ground

OUTLN 5 left channel negative output

n.c. 6 not connected

SDL 7 left channel shutdown input (activeLOW)

SDR 8 right channel shutdown input (active LOW)

AVDD 9 analog supply voltage (level same as PVDD)

n.c. 10 not connected

OUTRN 11 right channel negative output

PGND 12 power ground

PVDD 13 power supply voltage (level same as AVDD)

OUTRP 14 right channel positive output

G0 15 gain select input 0

INRP 16 right channel positive input

INRN 17 right channel negative input

AGND 18 analog ground

Contents

Main 1. General description 2. Features 3. Applications SA58670A Rev. 02 23 October 2008 Product data sheet 2.1 W/channel stereo class-D audio amplier Product data sheet Rev. 02 23 October 2008 2 of 24 2.1 W/channel stereo class-D audio amplier nEducational toy 4. Ordering information Fig 1. Block diagram 5. Block diagram Refer toTable 6 for gain selection. SA58670A 6. Pinning information 6.1 Pinning 6.2 Pin description 7. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). NXP Semiconductors SA58670A 8. Static characteristics C; unless otherwise specied =25 T . 9. Dynamic characteristics ; unless otherwise specied =8 =25 T 10. Typical performance curves Fig 3. Total harmonic distortion-plus-noise as a function of output power; RL=8 a. Gv(cl) =24dB b. Gv(cl) = 6 dB. fi=1 kHz. (1) VDD= 2.5 V. (2) VDD= 3.6 V. (3) VDD= 5.0 V. NXP Semiconductors SA58670A a. Gv(cl) =24dB. Fig 4. Total harmonic distortion-plus-noise as a function of output power; RL=4 b. Gv(cl) = 6 dB. fi=1 kHz. (1) VDD= 2.5 V. (2) VDD= 3.6 V. (3) VDD= 5.0 V. Fig 5. Total harmonic distortion-plus-noise as a function of frequency; VDD= 2.5 V Fig 6. Total harmonic distortion-plus-noise as a function of frequency; VDD= 3.6 V Fig 7. Total harmonic distortion-plus-noise as a function of frequency; VDD= 5.0 V Fig 8. Crosstalk (stepped all-to-one) as a function of frequency (1) Left channel. (2) Right channel. Fig 9. Noise output voltage (RMS value) as a function of frequency (1) VDD = 2.5 V. Fig 10. Crosstalk (one-to-one) as a function of frequency (3) VDD = 5.0 V. (1) left channel; RL=8. (2) right channel; RL=4. (3) right channel; RL=8. (1) VDD = 2.5 V. Fig 13. Supply current as a function of output power (3) VDD = 5.0 V. (1) VDD = 5.0 V. Fig 14. Power dissipation as a function of output power (3) VDD = 2.5 V. Fig 15. Output power efciency as a function of output power (1) VDD = 5.0 V. (3) VDD = 2.5 V. 11. Application information 11.1 Power supply decoupling considerations 11.2 Input capacitor selection 11.3 PCB layout considerations 11.4 Filter-free operation and ferrite bead lters 11.5 Efciency and thermal considerations 12. Test information 11.6 Additional thermal information 13. Package outline SOT917-1 Fig 18. Package outline SOT917-1 (HVQFN20) 14. Soldering of SMD packages 14.4 Reow soldering For further information on temperature proles, refer to Application Note AN10365 Surface mount reow soldering description . 15. Abbreviations 16. Revision history Product data sheet Rev. 02 23 October 2008 23 of 24 17. Legal information 17.1 Data sheet status 17.2 Denitions 17.3 Disclaimers 17.4 Trademarks 19. Contents