Table 2. Port Configuration Options (2 of 3)
Option | Factory | Comments/Description | |
|
|
| |
Port LB: | Disab | ||
|
| be initiated through the port by the external | |
| DTLB | ||
| DTE. | ||
|
|
| |
| DCLB |
| |
|
|
| |
| Both |
| |
|
|
| |
All Ones: | Disab | All ones sent to network (DTE) E1 when DTR | |
|
| or RTS interrupted. | |
| DTR | ||
|
| ||
|
|
| |
| RTS |
| |
|
|
| |
| Both |
| |
|
|
| |
Rcv RAI: | None | Data port remains enabled, or is disabled, on | |
(Action on Received |
| receiving RAI on the network interface. | |
Halt | |||
Remote Alarm |
| ||
Indication) |
|
| |
|
|
| |
Tx Clock: | Int | Selects whether the transmitted data clock is | |
|
| internal (TXC) or external (XTXC). | |
| Ext | ||
|
| ||
|
|
| |
InvertTxC: | Enab | Selects phase inversion of the transmit clock | |
(Invert Tx Clock) |
| (TXC). | |
Disab | |||
|
| ||
|
|
| |
InvertData: | Enab | Allows the data on the port to be inverted. | |
|
|
| |
| Disab |
| |
|
|
| |
EDL: | Enab | Specifies whether the Embedded Data Link is | |
|
| enabled. | |
| Disab | ||
|
| ||
|
|
| |
Err Rate: |
| Selects the error rate threshold for Excessive | |
(Excessive Error |
| Error Rate Alarm. | |
Rate) |
| ||
|
|
| |
|
| ||
|
|
| |
|
| ||
|
|
| |
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| ||
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| |
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