Philips Semiconductors Product specification

SA5223Wide dynamic range AGC transimpedance amplifier(150MHz)

1995 Oct 24 3

DC ELECTRICAL CHARACTERISTICS

Typical data and Min and Max limits apply at TA = 25°C, and VCC = +5V, unless otherwise specified.
SYMBOL
PARAMETER
TEST CONDITIONS
SA5223
UNIT
SYMBOL
PARAMETER
TEST
CONDITIONS
Min Typ Max
UNIT
VIN Input bias voltage 1.3 1.55 1.8 V
VO±Output bias voltage 2.9 3.2 3.5 V
VOS Output offset voltage (VPIN6 - VPIN7) -200 80 +200 mV
ICC Supply current 15 22 29 mA
IOMAX Output sink/source current 1.5 2 mA
NOTE: Standard deviations are estimated from design simulations to represent manufacturing variations over the life of the product.

AC ELECTRICAL CHARACTERISTICS

Typical data and Min and Max limits apply at TA = 25°C and VCC = +5V, unless otherwise specified.
SYMBOL
PARAMETER
TEST CONDITIONS
SA5223
UNIT
SYMBOL
PARAMETER
TEST
CONDITIONS
Min Typ Max
UNIT
RTTransresistance (differential output) DC tested, RL = , IIN = 0-1µA90 125 160 k
RTTransresistance
(single-ended output) DC tested, RL = , IIN = 0-1µA45 62.5 80 k
ROOutput resistance
(differential output) DC tested 140
ROOutput resistance
(single-ended output) DC tested 70
f3dB Bandwidth (-3dB) Test Circuit 1 110 150 MHz
RIN Input resistance DC tested 250
CIN Input capacitance10.7 pF
CINT Input capacitance including Miller multiplied
capacitance 4.0 pF
R/VTransresistance power supply sensitivity VCC1 = VCC2 = 5 ±0.5V 3 %/V
R/TT ransresistance ambient temperature sensi-
tivity TA = TA MAX - TA MIN 0.09 %/oC
IIN RMS noise current spectral density (referred
to input)2Test Circuit 2, f = 10MHz 1.17 pAńHz
Ǹ
Integrated RMS noise current over the band-
idth (referred to inp t)
Test circuit 2,
f = 50MHz 7
w
idth
(
re
f
erre
d
t
o
i
npu
t)
CS
=
0.1
p
F
f = 100MHz 12
IT
CS
=
0
.
1F
f = 150MHz 16 nA
T
f = 50MHz 8
CS = 0.4pF f = 100MHz 13
f = 150MHz 18
PSRR Power supply rejection ratio (change in VOS)DC Tested, VCC = ±0.5V –55 dB
PSRR Power supply rejection ratio3f = 1.0MHz, Test Circuit 3 –20 dB
VOLMAX Maximum differential output AC voltage Ii = 0–2mA peak AC 800 mV
dRT
dt AGC loop time constant parameter410µA to 20µA steps 1 dB/ms
IINMAX Maximum input amplitude for output duty
cycle of 50 ±5% Test circuit 4 +2 mA
tr, tfOutput rise and fall times 10 – 90% 2.2 ns
tDGroup delay f = 10MHz 2.2 ns
NOTES:
1. Does not include Miller-multiplied capacitance of input device.
2. Noise performance measured differential. Single-ended output noise is higher due to CM noise.
3. PSRR is output referenced and is circuit board layout dependent at higher frequencies. For best performance use a RF filter in VCC line.
4. This implies that the SA5223 gain will change 1dB (10%) in the absence of data for 1ms (i.e., can handle bursty data without degrading Bit
Error Rate (BER) for 100,000 cycles at 100MHz).