© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
User manual Rev. 02 — 23 May 2005 20 of 133
Philips Semiconductors UM10109
P89LPC932A1 User manual
1.5 Memory organization

The various P89LPC932A1 memory spaces are as follows:

DATA — 128 bytes of internal data memory space (00h:7Fh) accessed via direct or

indirect addressing, using instruction other than MOVX and MOVC. All or part of the Stack

may be in this area.

IDATA — Indirect Data. 256bytes of internal data memory space (00h :FFh) accessed via

indirect addressing using instructions other than MOVX and MOVC. All or part of the

Stack may be in this area. This area includes the DATA area and the 128 bytes

immediately above it.

SFR — Special Function Registers. Selected CPU registers and peripheral control and

status registers, accessible only via direct addressing.

CODE — 64 kB of Code memory space, accessed as part of program execution and via

the MOVC instruction. The P89LPC932A1 has 8kB of on-chip Code memory.

Fig 5. P89LPC932A1 memory map.

002aaa948
0000h
03FFh
0400h
07FFh
0800h
0BFFh
0C00h
0FFFh
SECTOR 0
SECTOR 1
SECTOR 2
SECTOR 3
1000h
13FFh
1400h
17FFh
1800h
1BFFh
1C00h
1E00h
1FFFh
SECTOR 4
SECTOR 5
SECTOR 6
FFEFh
FF00h IAP entry-
points
SECTOR 7
ISP CODE
(512B)*
SPECIAL FUNCTION
REGISTERS
(DIRECTLY ADDRESSABLE)
128 BYTES ON-CHIP
DATA MEMORY (STACK,
DIRECT AND INDIR. ADDR.)
4 REG. BANKS R[7:0]
data memory
(DATA, IDATA)
DATA
128 BYTES ON-CHIP
DATA MEMORY (STACK
AND INDIR. ADDR.)
IDATA (incl. DATA)
FFEFh
FF1Fh
FF00h
entry points for:
-51 ASM. code
-C code
IDATA routines
1FFFh
1E00h
entry points for:
-UART (auto-baud)
-I2C, SPI, etc.*
flexible choices:
-as supplied (UART)
-Philips libraries*
-user-defined
ISP serial loader
entry
points
read-protected
IAP calls only

Table 3: Data RAM arrangement

Type Data RAM Size (bytes)

DATA Directly and indirectly addressable memory 128

IDATA Indirectly addressable memory 256