© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
User manual Rev. 02 — 23 May 2005 9 of 133
Philips Semiconductors UM10109P89LPC932A1 User manual
P1.0 to P1.7 18, 17, 12,
11, 10, 6,
5, 4
14, 13, 8,
7, 6, 2, 1,
28
I/O, I [1] Port 1: Port 1 is an 8-bit I/O port with a user-configurable output type,
except for three pins as noted below. During reset Port1 latches are
configured in the input only mode with the internal pull-up disabled. The
operation of the configurable Port 1 pins as inputs and outputs depends
upon the port configuration selected. Each of the configurable port pins
are programmed independently. Refer to Section 4.1 “Port configurations”
and the P89LPC932A1 data sheet, Static characteristics for details.
P1.2 to P1.3 are open drain when used as outputs. P1.5 is input only.
All pins have Schmitt triggered inputs.
Port1 al so provides various special functions as described below:
18 14 I/O P1.0 — Port 1 bit 0.
OTXD — Transmitter output for the serial port.
17 13 I/O P1.1 — Port 1 bit 1.
IRXD — Receiver input for the serial port.
12 8 I/O P1.2 — Port1 bit 2 (op en-drain when used as output).
I/O T0 — Timer/counter0 external count input o r overflow output (open-drain
when used as output).
I/O SCL — I2C serial clock input/output.
11 7 I/O P1.3 — Port1 bit 3 (op en-drain when used as output).
IINT0 — External interrupt 0 input.
I/O SDA — I2C serial data input/output.
10 6 I P1.4 — Port1 bit 4.
IINT1 — External interrupt 1 input.
62IP1.5 — Port1 bit 5 (input only).
IRST — External Reset input during power-on or if selected via UCFG1.
When functioning as a reset input, a LOW on this pin resets the
microcontroller, causing I/O ports and peripherals to take on their default
states, and the processor begins execution at address0. Also used
during a power-on sequence to force In-System Programming mode.
When using an oscillator frequency above 12MHz, the reset input
function of P1.5 must be enabled. An external circuit is required to
hold the device in reset at powerup until VDD has reached its
specified level. When system power is removed VDD will fall below
the minimum specified operating voltage. When using an oscillator
frequency above 12MHz, in some applications, an external
brownout detect circuit may be required to hold the device in reset
when VDD falls below the minimum specified operating voltage.
51I/OP1.6 — Port1 bit 6.
OOCB — Output Compare B
428I/OP1.7 — Port 1 bit 7.
OOCC — Output Compare C
Table 1: Pin description …continued
Symbol Pin Type Description
TSSOP28,
PLCC28
HVQFN28