QSCLP-100 Revision November | Quatech QSC(LP)-100 specification

QSC(LP)-100

User's Manual

Revision 1.12

November 2006

P/N: 940-0180-112

QSC(LP)-100 User's Manual

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Quatech QSC(LP)-100 user manual QSCLP-100 Revision November

Contents

QSCLP-100 Warranty Information Iii Declaration of Conformity Address Map and Special Registers Enable Scratchpad Register SPAD, J2Base Address and Interrupt Level IRQ Enhanced Serial Adapter Identification General Information Factory Default Configuration Hardware Configuration Clock multiplier jumper options Force High-Speed Uart Clock X2, X4, or X8, J3-J5 Jumper/connector locations Hardware Installation Port Address Range Interrupt Status Register Enabling the Special Registers Bit Name Description Options Register RR1 RR0 Clock Rate Multiplier Windows Millennium Windows Configurations Windows Windows Using the New Hardware Found Wizard Viewing Resources with Device Manager Page Page Page Four-Port RS-232 Serial Adapter Page Page For legacy applicattions which cannot Page Page Windows NT Other Operating SystemsOS/2 DOS and other operating systems QTPCI.EXE QTPCI.EXE Expert Mode display External Connections RS-232 Port Signal INTA# PCI Resource Map ICL3245CA SpecificationsPage Computer will not boot up Troubleshooting QSCLP-100 Revision November