6.1 Accessing the Registers
The mode of communication desired is established and monitored through the bit values
of the internal read and write registers. The register set of the SCC includes 16 write registers and
9 read registers. These registers only occupy four address locations, which start at the MPA-100's
physical base address that is configured via the on board switches. This and all other addresses
are referenced from this base address in the form Base + Offset. An example of this is Base + 1
for the SCC Control Port, Channel A.
There are two register locations per SCC channel, a data port and a control port .
Accessing the internal SCC registers is a two step process that requires loading a register
pointer to perform the addressing to the correct data register. The first step is to write to the
control port the operation and address for the appropriate channel. The second step is to either
read data from or write data to the control port. The only exception to this rule is when accessing
the transmit and receive data buffers. These registers can be accessed with the two step process
described or with a single read or write to the data port. The following examples illustrate how
to access the internal registers of the SCC. Also, Table 10 describes the read registers and
Table 11 describes the write registers for each channel.
The MPA-100 has been designed to assure that all back to back access timing
requirements of the SCC are met without the need for any software timing control. The standard
of adding jmp $+2 between IO port accesses is not required when accessing the MPA-100.
Example 1: Enabling the transmitter on channel A.
mov dx,base ; load base address
add dx,ContA ; add control reg A offset (1)
mov al,05H ; write the register number
out dx,al
mov al,08H ; write data to the register
out dx,al
MPA-100 User's Manual 6-2