AN.No.G1216B1N000-3D0E
2.CIRCUIT CONFIGURATION
2.1Block Diagram
This product consists of two HD61202 segment drivers, an HD61203 common driver and a bias voltage generator. Figure 2 shows the block diagram.
DB0 to DB7 |
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RST, R/W, D / I, E |
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CS2 |
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CS1 |
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VLC |
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| Bias Voltage | Va, Vc, Vd, Vf |
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| Generator |
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VDD |
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| Vb |
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| Ve |
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VSS |
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| Vf |
| FRM |
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| Segment Driver 1 |
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| Segment Driver 2 |
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| M |
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| CL2 |
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| 1 | 64 | 64 | ||
| 2 |
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| Common Driver |
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| 64 |
| 12864 full dot matrix LCD | ||
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LEDA
LED Backlight
LEDC
Figure 2 Block Diagram
2.2Segment Drivers (HD61202)
The segment driver is a 64 drive output CMOS IC. The G1216 is driven with the panel divided into two right and left displays. A segment driver controls the divided screen. 8 bits of data transmitted from the MPU are saved in the internal display RAM, and the segment signal is generated to drive the LC. 1 bit of display RAM data corresponds to 1 dot lighting or
- 7 -