Silicon Laboratories C8051T620/2-DK

C8051T620/2-DK

20 Rev. 0.4

Figure 16. C8051T62x Emulation Daughter Board Schematic

Contents

Main C8051T620/2-DK C8051T620/2 DEVELOPMENT KIT USERS GUIDE 1. Kit Contents 2. About the Daughter Boards C8051T620/2-DK 2 Rev. 0.4 3. Hardware Setup C8051T62x EDB USB Cable 4. Software Installation 4.1. System Requirements 4.2. Development Tools Installation 4.3. CP210x USB to UART VCP Driver Installation 5. Software Overview 5.1. 8051 Evaluation Toolset 5.2. Silicon Labs IDE Table 1. Supported Third Party 8051 Toolsets Page C8051T620/2-DK 5.4. Keil uVision2, uVision3, and uVision4 Silicon Laboratories Drivers 5.5. Programming Utilities 5.6. ToolStick Terminal 6. Example Source Code 6.1. Register Definition Files 6.2. Blinking LED Example C8051T620/2-DK 7. Development Boards Figure 3. C8051T62x Motherboard C8051T62x-MB C8051T62x-MB Figure 4. C8051T62x Motherboard Default Shorting Block Positions Figure 5. C8051T62x Emulation Daughter Board C8051T62x EDB P3 J2 C8051T62x QFN32 SKT DB J3 J1 J1 Figure 9. C8051T321 QFN28 Socket Daughter Board J3 P3 Page 7.1. System Clock Sources 7.2. Switches, LEDs, and Potentiometer (J9, J10, and J12) 7.3. Power Supply Headers (J6 and J7) Figure 12.J6 and J7 Shorting Block Configuration for Power Options Table 2. Motherboard I/O Descriptions 7.4. USB Debug Adapter (DEBUG/P5) 7.5. UART to USB Communications Interfaces (COMM/P4) 7.6. Communications Interface Selector Headers (J8 and J11) Figure 13. Shorting Block Configuration for UART Communication Options 7.7. PORT I/O Connectors (J2, J3, J4, and J5) 7.8. Analog I/O (J1 and J14) 7.9. VPP Connection (J15) Table 3. J1 Terminal Block Descriptions Table 4. VPP Pin Sharing 7.10. Using Alternate Supplies with the C8051T62x Development Kit Page Page Page Page Page Page Page Page Page DOCUMENT CHANGE LIST Revision 0.2 to Revision 0.3 Revision 0.3 to Revision 0.4 CONTACT INFORMATION