Desktop System Controller Hub with Advanced, 8051µC-Based Auto Fan Control

Block Diagram

14.318 MHz

SER_IRQ

PCI_CLK

LAD[3:0]

LFRAME#

LDRQ#

PCI_RESET#

LPCPD#

IO_PME#*

IO_SMI#*

GP10*, GP11*, GP15*, GP21*, GP22*, GP23*, GP25*, GP26*, GP31*, GP33*, GP35*, GP36*, GP37*, GP40*, GP41*, GP42*, GP52*, GP53*, GP55*, GP57*, GO60*, GP61*, GP75*, GP76*, GP77*, GP80*, GP81*, GP82, GP83*, GP84*, GP8051_[12:1]*, GP8051_[17:14]*

TACH1

TACH2

TACH3

HVSS Remote1+ Remote1- Remote2+ Remote2-

HVTR

PWM1

PWM2

PWM3

PROCHOT_IN# PROCHOT_OUT

PECI VREF

CLOCK

GEN

SERIAL

IRQ

LPC

Bus Interface

Power Mgmt

General

Purpose

I/O

8051

ROM

Auto

Fan

Control

Analog

Interface

Analog

Block

IDE_RSTDRV#*, PCI_RST_SYS#*

PCI_RST_SLOTS#*, PS_ON#*

PWR_GOOD_3V*, PWRGD_PS, RSMRST#*

Glue Logic

Internal Bus

(Data, Address, and Control lines)

SCH5617C (128 QFP)

 

 

WDATA

 

 

 

 

 

 

 

WCLOCK

 

SMC PROPRIETARY

 

DIGITAL DATA

 

82077 COMPATIBLE

 

SEPARATOR

VERTICAL

 

WITH WRITE

FLOPPYDISK

 

PRECOM-

CONTROLLER CORE

 

PENSATION

 

 

RCLOCK

 

 

 

 

 

 

 

RDATA

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

LEDs

Multi-Mode

Parallel Port

with ChiProtectTM

High-Speed

16550A

UART

PORT 1

High-Speed

16550A

UART

PORT 2

SMBus Isolation

Circuits

Keyboard/Mouse

8042

controller

SECONDARY_HD#* PRIMARY_HD#* SCSI#* HD_LED#*

LED2*

LED3*

LED1*

PD[7:0]

BUSY,SLCT,PE ERROR#, ACK# STROBE#, INIT#

SLCTIN#

ALF#

TXD1*,RXD1* CTS1#*, RTS1#* DSR1#*, DTR1#* DCD1#*, RI1#*

TXD2*,RXD2* CTS2#*, RTS2#* DSR2#*, DTR2#* DCD2#*, RI2#*

SCLK*, SDAT* SCLK_1*, SDAT_1*

KCLK, MCLK KDAT, MDAT, KBDRST#, A20M P12*,P16*,P17*

PECI IO PECI AVAILABLE PECI REQUEST#

PECI

Interface

MRT0#, MRT1#*, TRK0#,

 

RDATA#,

Note 1: This diagram does not show power and ground

 

WDATA#

connections.

INDEX#,WRTPRT#,WGATE#,

 

 

 

 

HDSEL#,DRVDEN0*,

 

 

Note 2: Functions with "*" are located on multifunctional

DIR#, STEP#, DSKCHG#,DS0#, DS1#*

 

 

 

 

pins. This diagram is designed to show the various

 

 

 

functions available on the chip (not pin layout).

 

 

 

Figure 1 SCH5617C Block Diagram

Revision 0.7 (12-09-08)

PRODUCT4 PREVIEW

SMSC SCH5617C