Datasheet
Chapter 4 Interface Signal Definition
4.1Pin Descriptions
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| Table 4.1 - System Interface Signals | |||
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NAME | BUFFER |
| ACTIVE |
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| DESCRIPTION | |||
TYPE |
| LEVEL |
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RESET_N | IS |
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| Low | Chip Reset. The minimum active low pulse is 100ns. See section 8.4 for a | ||||
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| complete description of operation following a reset. | |||
SELF_PWR | I |
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| High | |||||
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| 0: Self/local power source is NOT available (i.e., 4- Port Hub gets all power | |||
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| from Upstream USB VBUS). |
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| 1: Self/local power source is available. | |||
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| Test Pin. Do Not Connect |
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TEST_P0 | IPD |
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| N/A |
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| Test Pin. Do Not Connect |
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TEST_P1 | IPD |
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| N/A |
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| Test Pin. Do Not Connect |
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TEST_P2 | IPD |
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| N/A |
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| Test Pin. Do Not Connect |
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TEST_P3 | IPD |
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| N/A |
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| Test Pin. Do Not Connect |
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ATEST | AO |
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| N/A |
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| Table 4.2 – Configuration Select and Serial Port Interface | ||||||
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NAME |
| BUFFER |
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| ACTIVE |
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| TYPE |
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| LEVEL |
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SMB_SEL_N |
| I |
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| N/A |
| SMBus Select. Selects between configuration via the SMBus interface, or | ||
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| from an external EEPROM or using the internal default, as described in | ||
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| the table below. |
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| SMB_SEL_N | CS/EE_SEL | SMBus or EEPROM interface |
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| configuration. |
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| 0 | 0 | SMBus slave. Address: 0101100 |
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| 0 | 1 | SMBus slave. Address: 0101101 |
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| 1 | 0 | Internal default configuration. |
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| 1 | 1 | |
CS/EE_SEL |
| IO8 |
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| N/A |
| Chip Select. This multifunction pin is sampled on the rising edge of | ||
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| RESET_N. If SMB_SEL_N = 1, the internal default configuration will be | ||
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| used when this pin is low, or the external I2C EEPROM will supply the | ||
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| configuration when this pin is high. When SMB_SEL_N = 0, this pin | ||
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| selects the SMBus slave address, as described in the table above. | ||
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| Connect a 1k ohm resistor in series with the input when connecting this | ||
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| pin to either VDD or VSS. |
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SD/SDA |
| IOSD12 |
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| N/A |
| Serial Data. Data I/O on the | ||
SCK/SCL |
| IOSD12 |
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| N/A |
| Serial Clock. Clock for the | ||
SMSC USB20H04 | Page 9 | Revision 1.63 |
DATASHEET